1. 17 May, 2009 1 commit
    • Ben Avison's avatar
      Miscellaneous v6-related updates · 9d9aa41b
      Ben Avison authored
      Detail:
       * Stopped calling the broken abort fixup code when running under VMSAv6.
         Might be desirable to update it, possibly farmed out to a separate module -
         still need to think about this.
       * Unaligned load optimisations can now be disabled by the global NoUnaligned
         flag for testing purposes.
       * Extended OS_ReadUnsigned to permit reading of 64-bit unsigned integers.
         See Docs.ReadUnsigned for more details. Also sped it up by using MLA
         (or UMLAL) for most digits rather than repeated addition.
       * Bugfix is OS_GSRead: an uninitialised r0 was being passed to
         OS_ReadUnsigned, causing undesirable effects on rare occasions.
      Admin:
        Tested on a rev B7 beagleboard.
      
      Version 5.35, 4.79.2.98.2.8. Tagged as 'Kernel-5_35-4_79_2_98_2_8'
      9d9aa41b
  2. 10 May, 2009 1 commit
    • Ben Avison's avatar
      Unaligned loads/stores optimised for ARMv6+ · 70865f8b
      Ben Avison authored
      Detail:
        Having scanned the kernel source for unaligned load code fragments which
        would abort on ARMv6 and v7 and not having found any, I took the opportunity
        to give them build-time switches to use unaligned LDR((S)H)/STR(H)
        instructions if built for a new enough platform. Also added a couple of
        cases of LDRSB that will benefit v4 CPUs and a few instances of the v6
        SXTH instruction, but since objasm doesn't yet understand it (and when it
        does, not everyone will have upgraded) they are currently written as
        DCI statements.
        Most of the changes are to OS_Word handlers, which are notorious in that
        their input/output block is not word-aligned.
      Admin:
        Not tested, but it should at least build.
      
      Version 5.35, 4.79.2.98.2.6. Tagged as 'Kernel-5_35-4_79_2_98_2_6'
      70865f8b
  3. 06 May, 2004 1 commit
    • Kevin Bracey's avatar
      * HAL can choose to limit amount of screen memory to allocate · 0f6941a8
      Kevin Bracey authored
        [Not fully implemented - for now leaves at least 16MB free if only
        one RAM area; was 1MB].
      * Added HAL_USBControllerInfo, HAL_MonitorLeadID and HAL_Video_Render.
      * Added HAL->OS call OS_IICOpV.
      * OS_MMUControl now allows independent control of I and C bits.
      * Added facility to deactivate keyboard debounce (magic word "NoKd" in
        R2 in KeyV 0).
      * Fixed problem with RAM amounts not a multiple of 4MB.
      * Supremacy bit (in VDU 19) now sets all 8 bits of supremacy.
      * Added PaletteV 14 (reads gamma tables).
      * Added Supremacy transfer functions (like gamma correction, but for
        supremacy). Allows easy global supremacy effects in a mode-independent
        fashion. Controlled with PaletteV 15,16.
      * Added modes 50-53 (320x240, 1,2,4,8bpp). Intended for small LCD.
      * Added 13.5kHz versions of TV modes (selected by Hdr:Machine).
      * Upped desktop version to 5.06.
      
      Version 5.35, 4.79.2.66. Tagged as 'Kernel-5_35-4_79_2_66'
      0f6941a8
  4. 15 Sep, 2000 1 commit
    • Kevin Bracey's avatar
      * Converted to building with ObjAsm (but still a single object file using ORG). · 49836a59
      Kevin Bracey authored
      * Added ARM_IMB and ARM_IMBRange SWIs as recommended by ARMv5.
      * Some early prototype HAL bits popped in - a lot of source restructuring still
        to come.
      * New debug target creates an AIF image with debug information, and translates
        this into an ASCII object file for the 16702B logic analyser.
      
      Version 5.35, 4.79.2.1. Tagged as 'Kernel-5_35-4_79_2_1'
      49836a59
  5. 04 Apr, 2000 1 commit
    • Kevin Bracey's avatar
      32-bit Kernel. · b4016e9c
      Kevin Bracey authored
      Details:
        The Kernel will now compile to produce a pure 32-bit system if No26bitCode is
        set to TRUE.
        If No26bitCode is FALSE, then the Kernel will be a standard 26-bit Kernel,
        although some internal changes have taken place to minimise compile
        switches between the two cases. See Docs.32bit for more technical info.
      
        The hardest part was the flood-fill...
      
      Other changes:
        Pointer shape changes now take place on the next VSync, rather than actually
        WAITING for the VSync. Turning the Hourglass on shouldn't slow your machine
        down by 5% now :)
      
        Lots of really crusty pre-IOMD code removed.
      
      Admin:
        Tested in 32 and 26-bit forms in a limited desktop build. Basically, this
        will need to see a lot of use to iron out difficulties. I'd like anyone who
        has a non-frozen project to at least attempt using this Kernel.
      
      Version 5.23. Tagged as 'Kernel-5_23'
      b4016e9c
  6. 05 Nov, 1996 1 commit