- 17 Mar, 2021 1 commit
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Jeffrey Lee authored
This adds initial support for the "long descriptor" MMU page table format, which allows the CPU to (flexibly) use a 40-bit physical address space. There are still some features that need fixing (e.g. RISCOS_MapInIO flags), and the OS doesn't yet support RAM above the 32bit limit, but this set of changes is enough to allow for working ROMs to be produced. Also, move MMUControlSoftCopy initialisation out of ClearWkspRAM, since it's unrelated to whether the HAL has cleared the RAM or not.
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- 13 Feb, 2021 1 commit
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Jeffrey Lee authored
In preparation for the addition of long descriptor page table support, start moving low-level page table routines into their own file (s.ShortDesc) so that we can add a corresponding long descriptor implementation in the future. * logical_to_physical, MakePageTablesCacheable, MakePageTablesNonCacheable, AllocateBackingLevel2, AMB_movepagesin_L2PT, AMB_movecacheablepagesout_L2PT, AMB_moveuncacheablepagesout_L2PT routines, and PageNumToL2PT macros, all moved to s.ShortDesc with no changes. * Add new UpdateL1PTForPageReplacement routine (by splitting some code out of s.ChangeDyn)
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