1. 08 Oct, 2014 1 commit
    • Robert Sprowson's avatar
      Header defs for Pi Compute module and IIC · fe5436ee
      Robert Sprowson authored
      OSEntries.h: added a C structure for RISCOS_IICOpV.
      GPIODevice.hdr: allocate Pandora and Pi Compute module sub device nos.
      HALDevice.hdr/Options.hdr: tabs expanded, capitalised abbreviations.
      Not tagged.
      fe5436ee
  2. 25 Feb, 2012 1 commit
    • Jeffrey Lee's avatar
      Add compressed ROM support. Make more use of ARMv5+ instructions. Other misc tweaks. · 538f3c24
      Jeffrey Lee authored
      Detail:
        hdr/OSEntries, s/HAL, s/Kernel - Add compressed ROM support.
        With the current scheme, a compressed ROM will have everything except the HAL and kernel compressed.
        During the keyboard scan period the kernel will allocate some temporary decompression workspace and call the decompression stub that was appended to the ROM.
        The decompression stub is expected to perform in-place decompression of the ROM. Once decompression is complete the workspace will be freed and the page tables updated to make the ROM image readonly.
        It's the HAL's responsibility to make sure any compressed ROM is located in an area of physically contiguous RAM large enough to hold the uncompressed image.
        More info here: http://www.riscosopen.org/wiki/documentation/show/Compressed%20ROMs
        Makefile, h/OSEntries - Add C export of hdr/OSEntries
        hdr/HALDevice - Add device ID for Tungsten video device. Convert tabs to spaces for consistency.
        hdr/HALEntries, s/NewReset - Moved KbdFlag_* definitions to hdr/HALEntries so HALs can use them in their keyboard scan code
        s/ArthurSWIs, S/HAL, s/HeapSort, s/Kernel, s/MemInfo, s/Middle, s/NewIRQs, s/TickEvents, s/vdu/vdugrafb - Make use of BLX, BFI and long multiplies if the CPU supports them. Don't support SWI calls from thumb mode if the CPU doesn't support thumb.
        s/HAL - Made the LDMIA in Init_MapInRAM more sensible (register order was backwards). The old code did work, but wasn't doing what the comments described. Removed unused/unfinished HAL_Write0 function. Improve RISCOS_LogToPhys to check L1PT for any section mappings if the logical_to_physical call fails
        s/ModHand - Save one instruction by using ADR instead of MOV+ADD to compute lr
        s/NewReset, s/PMF/key - Pass L1PT to HAL_Reset to allow machines without hardware reset (e.g. IOMD) to perform resets by manually disabling the MMU and restarting the ROM
        s/vdu/vdudriver, s/vdu/vdugrafv - Use GVEntry macro borrowed from NVidia module for setting up the GraphicsV jump table. Make GraphicsV_ReadPaletteEntry call HAL_Video_ReadPaletteEntry if left unclaimed. Fixup GV_Render to only call HAL_Video_Render if the HAL call is implemented.
      Admin:
        Tested with OMAP3, IOMD & Tungsten ROMs/softloads.
      
      
      Version 5.35, 4.79.2.138. Tagged as 'Kernel-5_35-4_79_2_138'
      538f3c24
  3. 20 Mar, 2010 2 commits
    • Jeffrey Lee's avatar
      Bring HAL branch of hdr/HALDevice, h/HALDevice in line with Cortex branch · ff0710fa
      Jeffrey Lee authored
      Detail:
        A fair number of bus/device types and IDs have been added to the Cortex branch since the branch was created.
        Now that the ClearIRQ entry has also been added, it's about time that the HAL branch was brought up to date.
      Admin:
        Untested, but should be fine.
      
      
      Version 5.35, 4.79.2.111. Tagged as 'Kernel-5_35-4_79_2_111'
      ff0710fa
    • Jeffrey Lee's avatar
      Add ClearIRQ entry to base HAL device struct, plus a couple of new HAL device IDs & bus types · 736b815d
      Jeffrey Lee authored
      Detail:
        hdr/HALDevice, h/HALDevice - inserted the new 'ClearIRQ' entry point into one of the reserved areas.
        Once the RISC OS-side driver has serviced the device's IRQ the ClearIRQ entry point should be called to allow the HAL device to clear any latched interrupt states in intermediate IRQ controllers (e.g. when using GPIO IRQs on OMAP)
        Since this entry point is new, support for it in existing device drivers isn't guaranteed; HAL device implementations of existing APIs must make sure the use a new major version number to indicate that they require ClearIRQ to be called.
        hdr/HALDevice - added some new bus types to represent the GPMC & L3/L4 interconnects in the OMAP.
        hdr/HALDevice - added ethernet NIC device type & IDs for SMSC9221 & DM9000 NICs
      Admin:
        Tested on rev C2 beagleboard
      
      
      Version 5.35, 4.79.2.98.2.25. Tagged as 'Kernel-5_35-4_79_2_98_2_25'
      736b815d
  4. 21 Feb, 2003 1 commit
    • Ben Avison's avatar
      Miscellaneous stuff. · d91e9420
      Ben Avison authored
      Detail:
        * Merged in the change to RISC OS 4.02 kernel that moved the GSTrans
          workspace out of scratch space.
        * Fixed a few bugs in callback postponement, and interrupt holes in
          callback dispatch. See Docs.CallbackChange for full info.
        * Fixed SystemSizeCMOS to SysHeapCMOS - wouldn't build as was.
        * Added an export of a C version of Hdr:HALDevice, based on the Hdr2H
          translation but with an additional struct definition. Required by
          SoundControl 1.00.
        * Added some additional location and ID allocations to Hdr:HALDevice.
          Required by today's HAL and SoundControl.
      Admin:
        Partially tested.
      
      Version 5.35, 4.79.2.56. Tagged as 'Kernel-5_35-4_79_2_56'
      d91e9420