- 23 May, 2016 1 commit
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Jeffrey Lee authored
Detail: s/ChangeDyn - When DynArea_PMP_PhysOp generates an error during the initial page list scan, make sure r12 is initialised to the (new) PMP size, as expected by PMPMemoryMoved. s/AMBControl/allocate, s/AMBControl/growshrink - Document some extra exit conditions for the AMB allocate & grow/shrink routines Admin: Tested on BB-xM Fixes RAM disc PMP becoming corrupt when attempting to grow it (e.g. via *ChangeDynamicArea) by an amount larger than the amount of free memory in the system Version 5.35, 4.79.2.324. Tagged as 'Kernel-5_35-4_79_2_324'
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- 06 Sep, 2015 1 commit
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Jeffrey Lee authored
Detail: s/ChangeDyn - Fix OS_DynamicArea 20 to work properly with sparse & PMP DAs. It now checks against the max extent of the area rather than the current size; this matches the logic used for checking fixed system workspace areas. The call only determines the ownership of a logical address, and it's considered the caller's responsibility to check if there's actually a page at the given address. s/ChangeDyn - Revise OS_DynamicArea 25 to remove the redundant 'PMP page flags' entry, and to allow pages to be looked up by either PMP page index, phys page number, or DA page index s/ChangeDyn - Tidy up InitDynamicAreas by adding the NextFreePage routine to help determine the next page to be added to the free pool. s/AMBControl/Workspace, s/AMBControl/main, s/AMBControl/memmap - Fix lazy mapping in of pages to use the correct L2PT flags for the default CB cache policy s/AMBControl/allocate - Get rid of magic constant when extracting page flags from DA flags, and make note of the fact that assorted bits of code ignore the flags s/AMBControl/growp, s/AMBControl/shrinkp - Reverse the page order when growing/shrinking areas, to match OS_ChangeDynamicArea. This helps both DAs and application space to have pages allocated to them in contiguous physical order - which in turn helps produce shorter, more optimal scatter lists for DMA Admin: Tested on Pandaboard Version 5.35, 4.79.2.287. Tagged as 'Kernel-5_35-4_79_2_287'
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- 31 Aug, 2015 1 commit
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Jeffrey Lee authored
Detail: This set of changes adds support for "physical memory pools" (aka PMPs), a new type of dynamic area which allow physical pages to be claimed/allocated without mapping them in to the logical address space. PMPs have full control over which physical pages they use (similar to DAs which request specific physical pages), and also have full control over the logical mapping of their pages (which pages go where, and per-page access/cacheability control). Currently the OS makes use of two PMPs: one for the free pool (which now has a logical size of zero - freeing up gigabytes of logical space), and one for the RAM disc (logical size of 1MB, allowing for a physical size limited only by the amount of free memory) Implementing these changes has required a number of other changes to be made: * The CAM has been expanded from 8 bytes per entry to 16 bytes per entry, in order to allow each RAM page to store information about its PMP association * The system heap has been expanded to 32MB in size (from just under 4MB), in order to allow it to be used to store PMP page lists (1 word needed per page, but PMP pages may not always have physical pages assigned to them - so to allow multiple large PMPs to exist we need more than just 1 word per RAM page) * The &FA000000-&FBFFFFFF area of fixed kernel workspace has been shuffled around to accomodate the larger CAM, and the system heap is now located just above the RMA. * SoftResets code stripped out (unlikely we'll ever want to fix and re-enable it) * A couple of FastCDA options are now permanently on * Internal page flags shuffled around a bit. PageFlags_Unavailable now publicly exposed so that PMP clients can lock/unlock pages at will. * When OS_ChangeDynamicArea is asked to grow or shrink the free pool, it now implicitly converts it into a shrink or grow of application space (which is what would happen anyway). This simplifies the implementation; during a grow, pages (or replacement pages) are always sourced from the free pool, and during a shrink pages are always sent to the free pool. File changes: - hdr/KernelWS - Extend DANode structure. Describe CAM format. Adjust kernel workspace. - hdr/OSRSI6, s/Middle - Add new item to expose the CAM format - hdr/Options - Remove SoftResets switch. Add some PMP switches. - s/ARM600, s/VMSAv6 - Updated for new CAM format. Note that although the CAM stores PMP information, BangCamUpdate currently doesn't deal with updating that data - it's the caller's responsibility to do so where appropriate. - s/ChangeDyn - Lots of changes to implement PMP support, and to cope with the new CAM format. - s/HAL - Updated to cope with new CAM format, and lack of logical mapping of free pool. - s/MemInfo - Updated to cope with new CAM format. OS_Memory 0 updated to cope with converting PPN to PA for pages which are mapped out. OS_Memory 24 updated to decode the access permissions on a per-page basis for PMPs, and fixed its HWM usage for sparse DAs. - s/NewReset - Soft reset code and unused AddCamEntries function removed. Updated to cope with new CAM format, PMP free pool, PMP RAMFS - s/AMBControl/allocate - Update comment (RMA hasn't been used for AMBControl nodes for a long time) - s/AMBControl/growp, s/AMBControl/memmap, s/AMBControl/shrinkp - Update for new CAM format + PMP free pool - s/vdu/vdudriver - Strip out soft reset code. Admin: Tested on Pandaboard This is just a first iteration of the PMP feature, with any luck future changes will improve functionality. This means APIs are subject to change as well. Version 5.35, 4.79.2.284. Tagged as 'Kernel-5_35-4_79_2_284'
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- 08 Aug, 2011 1 commit
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Jeffrey Lee authored
Detail: A whole mass of changes to add high processor vectors + zero page relocation support to the Cortex branch of the kernel At the moment the code can only cope with two ZeroPage locations, &0 and &FFFF0000. But with a bit more tweaking those restrictions can probably be lifted, allowing ZeroPage to be hidden at almost any address (assuming it's fixed at compile time). If I've done my job right, these restrictions should all be enforced by asserts. There's a new option, HiProcVecs, in hdr/Options to control whether high processor vectors are used. When enabling it and building a ROM, remember: * FPEmulator needs to be built with the FPEAnchor=High option specified in the components file (not FPEAnchorType=High as my FPEmulator commit comments suggested) * ShareFS needs unplugging/removing since it can't cope with it yet * Iyonix users will need to use the latest ROOL boot sequence, to ensure the softloaded modules are compatible (OMAP, etc. don't really softload much so they're OK with older sequences) * However VProtect also needs patching to fix a nasty bug there - http://www.riscosopen.org/tracker/tickets/294 The only other notable thing I can think of is that the ProcessTransfer code in s/ARM600 & s/VMSAv6 is disabled if high processor vectors are in use (it's fairly safe to say that code is obsolete in HAL builds anyway?) Fun challenge for my successor: Try setting ZeroPage to &FFFF00FF (or similar) so its value can be loaded with MVN instead of LDR. Then use positive/negative address offsets to access the contents. File changes: - hdr/ARMops - Modified ARMop macro to take the ZeroPage pointer as a parameter instead of 'zero' - hdr/Copro15ops - Corrected $quick handling in myISB macro - hdr/Options - Added ideal setting for us to use for HiProcVecs - s/AMBControl/allocate, s/AMBControl/growp, s/AMBControl/mapslot, s/AMBControl/memmap, s/AMBControl/service, s/AMBControl/shrinkp, s/Arthur2, s/Arthur3, s/ArthurSWIs, s/ChangeDyn, s/ExtraSWIs, s/HAL, s/HeapMan, s/Kernel, s/MemInfo, s/Middle, s/ModHand, s/MoreSWIs, s/MsgCode, s/NewIRQs, s/NewReset, s/Oscli, s/PMF/buffer, s/PMF/IIC, s/PMF/i2cutils, s/PMF/key, s/PMF/mouse, s/PMF/osbyte, s/PMF/oseven, s/PMF/osinit, s/PMF/osword, s/PMF/oswrch, s/SWINaming, s/Super1, s/SysComms, s/TickEvents, s/Utility, s/vdu/vdu23, s/vdu/vdudriver, s/vdu/vdugrafl, s/vdu/vdugrafv, s/vdu/vdupalxx, s/vdu/vdupointer, s/vdu/vduswis, s/vdu/vduwrch - Lots of updates to deal with zero page relocation - s/ARM600 - UseProcessTransfer option. Zero page relocation support. Deleted pre-HAL ClearPhysRAM code to tidy the file up a bit. - s/ARMops - Zero page relocation support. Set CPUFlag_HiProcVecs when high vectors are in use. - s/KbdResPC - Disable compilation of dead code - s/VMSAv6 - UseProcessTransfer option. Zero page relocation support. Admin: Tested with OMAP & Iyonix ROM softloads, both with high & low zero page. High zero page hasn't had extensive testing, but boot sequence + ROM apps seem to work. Version 5.35, 4.79.2.98.2.48. Tagged as 'Kernel-5_35-4_79_2_98_2_48'
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- 10 Nov, 2000 1 commit
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Mike Stephens authored
Version 5.35, 4.79.2.12. Tagged as 'Kernel-5_35-4_79_2_12'
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- 06 Nov, 1996 1 commit
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Neil Turton authored
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