1. 21 Feb, 2009 1 commit
    • Jeffrey Lee's avatar
      Add support for Cortex cache type. Extend ARM_Analyse to, where appropriate,... · ad9cdf41
      Jeffrey Lee authored
      Add support for Cortex cache type. Extend ARM_Analyse to, where appropriate, use CPU feature registers to identify CPU capabilities.
      
      Detail:
        s/ARMops - Support for Cortex multi-level cache (CT_ctype_WB_CR7_Lx). New ARM_Analyse_Fancy to identify CPU capabilities using feature registers.
        s/HAL - Modify pre-ARMop cache code to handle Cortex-syle caches.
        s/MemInfo - Replace ARM_flush_TLB macro call with appropriate ARMop to provide Cortex compatability
        hdr/ARMops - Update list of ARM architectures
        hdr/CoPro15ops - Deprecate ARM_flush_* macros for HAL kernels, as they are no longer capable of flushing all cache types. ARMops should be used instead.
        hdr/KernelWS - Add storage space for multi-level cache properties required for new cache cleaning code.
      Admin:
        Tested under qemu-omap3. Still unable to verify on real hardware due to lack of appropriate MMU code. However new OMAP3 HAL code that uses similar cache management functions appears to work fine on real hardware.
      
      
      Version 5.35, 4.79.2.98.2.2. Tagged as 'Kernel-5_35-4_79_2_98_2_2'
      ad9cdf41
  2. 01 Feb, 2009 1 commit
    • Jeffrey Lee's avatar
      Initial kernel support for Cortex-A8 processors. · e2262380
      Jeffrey Lee authored
      Detail:
        hdr/ARMops - Added Cortex_A8 processor type, new ARM architecture number
        hdr/Options - Enabled various kernel debug options
        s/ARMops - Added Cortex-A8/OMAP3530 to known CPUs list. Ignore cache type register for ARM architecture &F.
        s/NewIRQs - Increase MaxInterrupts to 96
      Admin:
        Brief testing under qemu-omap3.
      
      
      
      Version 5.35, 4.79.2.98.2.1. Tagged as 'Kernel-5_35-4_79_2_98_2_1'
      e2262380
  3. 07 Oct, 2002 1 commit
  4. 27 Jun, 2001 1 commit
    • Mike Stephens's avatar
      StrongARM is back, and this time it's provisional! · f39e1298
      Mike Stephens authored
      IOMD HAL:
        enables fast clock for StrongARM on Medusa h/w
      
      Kernel:
        ARMops for StrongARM implemented. Tested moderately on
        HAL/32-bit minimal desktop build for Risc PC. Could do
        with more testing later. eg. does reentrant cache
        cleaning support really work?
        Lazy task swapping is enabled for revT or later, wahey.
      
      Version 5.35, 4.79.2.42. Tagged as 'Kernel-5_35-4_79_2_42'
      f39e1298
  5. 20 Oct, 2000 1 commit
  6. 16 Oct, 2000 1 commit