GitLab

Detail:
  * Rejigged documented meaning of device "Location" field so that we can
    fit full PCI locations in.
  * Defined lots of device "Type" values in Hdr:HALDevice.
  * Removed obsolete DMA-related HAL entries in Hdr:HALEntries (no longer
    required by DMAManager 0_15-4_4_2_6, no longer provided by Tungsten HAL
    0.07).
  * OS_Hardware 2 and 3 actually work now.
  * Changed OS_Hardware 4 to take a maximum major version number to match.
  * HAL workspace is now USR mode readable.
  * Service calls issued after module initialisation/finalisation (see
    Docs.ModPostServ).
Admin:
  OS_Hardware tested, service calls not tested.

Version 5.35, 4.79.2.52. Tagged as 'Kernel-5_35-4_79_2_52'

Detail:
  Lots of changes since last version, at least the following:
  * Updated OS timestamp, removed alpha status
  * Negative INKEY OS version changed to &AA
  * GraphicsV is now alocated vector number &2A
  * ROM moved up to &FC000000
  * Max application slot increased to 512 Mbytes (for now)
  * Max size of RMA increased to 256 Mbytes
  * RMA is now first-created dynamic area (so it gets lowest address after
    top of application slot)
  * OS_Memory 10 reimplemeted
  * New OS_ReadSysInfo 6 values 18-22 added
  * OS_ReadSysInfo 8 gains flag bit to indicate soft power-off
  * Misc internal top-bit-set-address fixes
  * *ChangeDynamicArea can take sizes in megabytes or gigabytes
  * Magic word "&off" in R0 passed to OS_Reset powers down if possible
  * Added acceleration: block copy; CLS; text window scroll up; rectangle
    fill
  * Disabled LED flashing in page mode (liable to crash)
  * Masked sprite plot and VDU 5 text avoids reading the screen if possible
  * Framestore made USR mode accessible
  * Fix for VDU 5,127 bug - now relies on font definitions being in extreme
    quarters of memory, rather than bottom half
  * Allocated 64-bit OS_Convert... SWIs
  * IIC errors use allocated error numbers
  * Looks for Dallas RTC before Philips RTC because we're using a Philips
    NVRAM device with the same ID
  * Fix to bug that meant the oscillator in the Dallas RTC wasn't enabled
  * Default mouse type (USB) changed to allocated number
  * Ram disc max size increased to 128 Mbytes (Ursula merge) and made
    cacheable for StrongARMs (not XScale)
  * Branch through zero handler now works in USR mode, by use of a
    trampoline in the system stack to allow PC-relative register storage
  * Address exception handler changed to not use 0 as workspace
  * OS_Memory 13 extended to allow specification of cacheability and access
    privileges
  * Added OS_Memory 16 to return important memory addresses
  * RISCOS_MapInIO() takes cacheable flag in bit 3, access permissions in
    bits 10 and 11, doubly-mapped flag in bit 20, and access permissions
    specified flag in bit 21
  * Bug fix in last version for application abort handlers didn't quite
    work; register shuffle required
  * "Module is not 32-bit compatible" error now reports the module name
  * Default configured language changed from 10 to 11 (now Desktop again)

Version 5.35, 4.79.2.51. Tagged as 'Kernel-5_35-4_79_2_51'

In the No26bitCode case (ie when abort handlers are entered in ABT32 mode), if lazy task swapping was enabled and a data abort occurred that was not a page translation fault, then the code in AMB_LazyFixUp to map in the whole application slot was being circumvented, leading to problems for abort handlers in application space because r14_abt was corrupted by any abort due to accessing the abort handler itself. The test of the FSR (to compensate for the FAR being unusable for external aborts) which prompted the circumvention has therefore been moved inside AMB_LazyFixup.

Also now preserves the FSR and FAR across AMB_LazyFixUp, so they are now
visible from application abort handlers if desired.

Version 5.35, 4.79.2.50. Tagged as 'Kernel-5_35-4_79_2_50'

Detail:
  * Implemented OS_Hardware 2, 3 and 4 as described in Docs.HAL.NewAPI.
  * Added new OS->HAL and HAL->OS routines to register HAL devices with the
    OS during hard resets.
  * Updated Docs.HAL.NewAPI to correct inconsistencies, fill in missing
    definitions, and allow for interrupt sharing.
  * Now uses OS_LeaveOS to trigger callbacks after ROM module init.
Admin:
  Untested. Requires new HAL.

Version 5.35, 4.79.2.49. Tagged as 'Kernel-5_35-4_79_2_49'

Version 5.35, 4.79.2.48. Tagged as 'Kernel-5_35-4_79_2_48'

Detail:
  I pinched the IIC code from here to build MPEGDriver-0_32-1_33_2_2; now
  that I've added re-entrancy there (MPEGDriver-0_32-1_33_2_4), I'm folding
  the changes back in here, in case it's ever of use to someone else.
  Re-entrancy is achieved by restricting register use to r0-r3,r10,r11,CPSR
  so that re-entered code can complete any pending IIC operation by
  pulling those registers from the IRQ stack, before executing the new
  operation.
  The bugfix is regarding a continued read transaction - previously, the
  final byte read of a read transaction was never acknowledged; it needs to
  be acknowledged if it is immediately followed by another read transaction
  without its own repeated Start condition.
Admin:
  Tested as part of MPEGDriver, but not as part of a kernel build.

Version 5.35, 4.79.2.47. Tagged as 'Kernel-5_35-4_79_2_47'

Detail:
    The Kernel now sets "ProtectStationID" on the basis of the Embedded_UI
flag, rather than the STB flag, so you're able to set the bottom byte of your
IP address in IPConfig.

Admin:
    Untested.

Version 5.35, 4.79.2.46. Tagged as 'Kernel-5_35-4_79_2_46'

A little bit of magic to make DMA the highest priority interrupt on the L7200 so Ethernet doesn't make sound go clicky.

Version 5.35, 4.79.2.45. Tagged as 'Kernel-5_35-4_79_2_45'

Version 5.35, 4.79.2.44. Tagged as 'Kernel-5_35-4_79_2_44'

Work-around for L7200 palette programming bug added.

Version 5.35, 4.79.2.43. Tagged as 'Kernel-5_35-4_79_2_43'

IOMD HAL:
  enables fast clock for StrongARM on Medusa h/w

Kernel:
  ARMops for StrongARM implemented. Tested moderately on
  HAL/32-bit minimal desktop build for Risc PC. Could do
  with more testing later. eg. does reentrant cache
  cleaning support really work?
  Lazy task swapping is enabled for revT or later, wahey.

Version 5.35, 4.79.2.42. Tagged as 'Kernel-5_35-4_79_2_42'

1) Bring IOMD HAL more up to date. Add support for new call HAL_CleanerSpace (preparation for StrongARM kernel support).

2) In kernel, add HAL_CleanerSpace call (preparation for
StrongARM and XScale core support). Fix bug found with
ARMv3 support during test on Risc PC.

3) Implement new API for kernel SWIs that have used top
bits of addresses as flags. The new API has an extra
flag that must be set, so kernel can distinguish and
support both APIs. The reason for all this is that
addresses are 32-bits now, people, keep up there. Briefly:

  OS_HeapSort
    bit 31 of r0 set for new API, r1 is full 32-bit address
    flags move from r1 bits 31-29 to r0 bits 30-28

  OS_ReadLine
    bit 31 of r1 set for new API, r0 is full 32-bit address
    flags move from bits 31,30 of r0 to bits 30,29 of r1

  OS_SubstituteArgs
    bit 31 of r2 set for new API, r0 is full 32-bit address
    flag moves from bit 31 of r0 to bit 30 of r2

Tested on Risc PC and briefly on Customer A 2

Ta

Version 5.35, 4.79.2.41. Tagged as 'Kernel-5_35-4_79_2_41'

fix bug in oscli gstrans handling (a problem provoked by long command lines with top bit set buffer addresses and not fixed properly). Problem was mistaken rejection of gstrans'd parameters other than at beginning of buffer.

Tested on simple desktop build for Risc PC

Version 5.35, 4.79.2.40. Tagged as 'Kernel-5_35-4_79_2_40'

L7200 HAL turns on the necessary clocks for the SIC (AC'97) interface. Also makes sure the codec is held in reset on Customer M/L boards.

Version 5.35, 4.79.2.39. Tagged as 'Kernel-5_35-4_79_2_39'

Ursula. Quite a hairy code merge really, so let's hope it is
worth it to someone. What you get (back after 2 or 3 years):
- much more efficient for largish numbers of DAs (relevance
  to current build = approx 0)
- fancy reason codes to support fast update of
  Switcher bar display (relevance = 0)
- support for clamped maximum area sizes, to avoid address
  space exhaustion with big memory (relevance = 0)
- better implementation of shrinkable DAs, performance
  wise (if lots of DAs, relevance = approx 0)
- support for 'Sparse' DAs. Holey dynamic areas, Batman!
  (relevance, go on someone use the darned things)
Moderately development tested on HAL/32bit ARM9 desktop.
Note the Switcher should be compiled to use the new
reason codes 6&7, for fabled desktop builds.

Also, during this work, so I could see the wood for the
trees, redid some source code clean up, removing pre-Medusa
stuff (like I did about 3 years ago on Ursula, sigh). That's
why loads of source files have changed. The new DA stuff
is confined pretty much to hdr.KernelWS and s.ChangeDyn.

Ta.

Version 5.35, 4.79.2.38. Tagged as 'Kernel-5_35-4_79_2_38'

Look for LongCommandLine flag, command line size currently
set at 1k.
For HAL/32bit builds, the kernel buffer space is at high
(top bit set) address, which may break some code using signed
comparisons. So *beware* that there may be some latent
bugs in old kernel code using these buffers, not yet found.
One such bug, in s.Arthur2 found and fixed.
Tested moderately on ARM9 desktop build.
Lovely to reimplement things I did two and half years ago.

Version 5.35, 4.79.2.37. Tagged as 'Kernel-5_35-4_79_2_37'

LazyFixup now ensures all app pages are mapped in before handing
on a real (no-lazy) abort. This allows an abort handler in app
space itself, without scrambling the details of the original
abort (via a lazy abort in abort mode).
Many a happy minute spent coding and testing for recursive
aborts and fixups, but lets just pretend it doesn't happen
shall we.
Tested with simple popbang code on ARM9 desktop build.

Version 5.35, 4.79.2.36. Tagged as 'Kernel-5_35-4_79_2_36'

Detail:

  * (As above.)  The HAL entry table was missing the HAL_FIQDisableCode
    entry, causing assertion checks to fail.

Admin:

  * Problem found during Customer L build.

  * Built but untested.

Version 5.35, 4.79.2.35. Tagged as 'Kernel-5_35-4_79_2_35'

Moved IOAllocPtr and IOAllocLimit to SkippedTables - the ARM9 got away with it because of the writeback cache, but poor souls like Simon condemned to an eternity of the ARM7 were a bit stuffed.

Version 5.35, 4.79.2.34. Tagged as 'Kernel-5_35-4_79_2_34'

* Allows HAL-driven software resets.
* Sound buffers corrected to be uncacheable.

Version 5.35, 4.79.2.33. Tagged as 'Kernel-5_35-4_79_2_33'

  hooks to give correct mapping info for OS_Memory 0
  same for OS_ReadMemMapEntries
  same for OS_FindMemMapEntries
  Lazy fixup routine no longer assumes an abort in current
  app space must be a truant page. However, work in this
  area not complete (no support yet for abort handler code
  in app space itself, eg. for C trampoline)
Good to know this will be a big performance boost when
our products use one monolithic application (sarcasm).
Ta

Version 5.35, 4.79.2.32. Tagged as 'Kernel-5_35-4_79_2_32'

Reimplement Lazy task swapping, an amusing idea from Ursula, would have done it sooner but couldn't be bothered (humour).

Currently activates for all ARMs flagged as base-restored
abort model. No handling of eg. StrongARM pre-revT bug, but
then the kernel no longer runs on StrongARM (progress).
Still some details to fix: all aborts in current app space
assumed to be missing pages, but this must be fixed to
handle abort code in app space, things like debuggers
marking code read only.

Plus, small fixes:
  OS_Memory 8 returns vaguely useful info for RAM,VRAM
  in HAL build (temporary partial implementation)
  Broken handling of old BBC commands with (fx,tv etc)
  with no spaces fixed (fudgeulike code from Ursula,
  now 32-bit).

Version 5.35, 4.79.2.31. Tagged as 'Kernel-5_35-4_79_2_31'

* Kernel puts sensible default FIQ handler in through the HAL.
* Fix to temporary page uncaching code.

Version 5.35, 4.79.2.30. Tagged as 'Kernel-5_35-4_79_2_30'

Detail:

  * Must now specify the hardware target
    to ensure that the L7200 HAL is built with the appropriate tweaks to
    support each.  This is achieved by specifying:

              -options "BOARD=<target>"

    within the components file for the HAL_L7200 component.

Admin:

  * Tested on Customer L build to create a ROM suitable for the Customer M unit
    (that has only minor differences to the Customer L).

  * Affects all projects using the L7200 HAL, which must now specify the
    hardware target in the components file.

Version 5.35, 4.79.2.29. Tagged as 'Kernel-5_35-4_79_2_29'

spectacular new OS_Memory reason codes 13 map permanent I/O space, return logical address 14 access temporary physical mapping 15 release temporary physical mapping

DA creation and I/O space creation now avoid collision if address
space fills

Version 5.35, 4.79.2.28. Tagged as 'Kernel-5_35-4_79_2_28'

Version 5.35, 4.79.2.27. Tagged as 'Kernel-5_35-4_79_2_27'

Version 5.35, 4.79.2.26. Tagged as 'Kernel-5_35-4_79_2_26'

Detail:
  Maths was wrong.  The returned baud rate is the crystal frequency divided
by the divisor.

Admin:
  Assembles, not tested.

Version 5.35, 4.79.2.25. Tagged as 'Kernel-5_35-4_79_2_25'

Detail:
  MOV a3, a1 doesn't move a3 into a1...

Admin:
  Not tested.



Version 5.35, 4.79.2.24. Tagged as 'Kernel-5_35-4_79_2_24'

Version 5.35, 4.79.2.23. Tagged as 'Kernel-5_35-4_79_2_23'

Version 5.35, 4.79.2.22. Tagged as 'Kernel-5_35-4_79_2_22'

Version 5.35, 4.79.2.21. Tagged as 'Kernel-5_35-4_79_2_21'

Version 5.35, 4.79.2.20. Tagged as 'Kernel-5_35-4_79_2_20'

An attempt to do NVMemory by using part of the Flash that the OS is sitting
in for Customer L. Programming algorithm works, but I'm not confident that the
Kernel does the right thing yet.

Version 5.35, 4.79.2.19. Tagged as 'Kernel-5_35-4_79_2_19'

Version 5.35, 4.79.2.18. Tagged as 'Kernel-5_35-4_79_2_18'

Version 5.35, 4.79.2.17. Tagged as 'Kernel-5_35-4_79_2_17'

Detail:
  HAL entries have been entered for the Customer L UART (very much like the ARM
PrimeCell, rather than the 16550).
Admin:
  It builds.

Version 5.35, 4.79.2.16. Tagged as 'Kernel-5_35-4_79_2_16'

Detail:
  page swap as part of PagesUnsafe/PagesSafe mechanism
Admin:
  not tested

Detail:

Admin:
  not tested