1. 08 Aug, 2011 1 commit
    • Jeffrey Lee's avatar
      Add zero page relocation support · 2247d8e9
      Jeffrey Lee authored
      Detail:
        A whole mass of changes to add high processor vectors + zero page relocation support to the Cortex branch of the kernel
        At the moment the code can only cope with two ZeroPage locations, &0 and &FFFF0000. But with a bit more tweaking those restrictions can probably be lifted, allowing ZeroPage to be hidden at almost any address (assuming it's fixed at compile time). If I've done my job right, these restrictions should all be enforced by asserts.
        There's a new option, HiProcVecs, in hdr/Options to control whether high processor vectors are used. When enabling it and building a ROM, remember:
        * FPEmulator needs to be built with the FPEAnchor=High option specified in the components file (not FPEAnchorType=High as my FPEmulator commit comments suggested)
        * ShareFS needs unplugging/removing since it can't cope with it yet
        * Iyonix users will need to use the latest ROOL boot sequence, to ensure the softloaded modules are compatible (OMAP, etc. don't really softload much so they're OK with older sequences)
        * However VProtect also needs patching to fix a nasty bug there - http://www.riscosopen.org/tracker/tickets/294
        The only other notable thing I can think of is that the ProcessTransfer code in s/ARM600 & s/VMSAv6 is disabled if high processor vectors are in use (it's fairly safe to say that code is obsolete in HAL builds anyway?)
        Fun challenge for my successor: Try setting ZeroPage to &FFFF00FF (or similar) so its value can be loaded with MVN instead of LDR. Then use positive/negative address offsets to access the contents.
        File changes:
        - hdr/ARMops - Modified ARMop macro to take the ZeroPage pointer as a parameter instead of 'zero'
        - hdr/Copro15ops - Corrected $quick handling in myISB macro
        - hdr/Options - Added ideal setting for us to use for HiProcVecs
        - s/AMBControl/allocate, s/AMBControl/growp, s/AMBControl/mapslot, s/AMBControl/memmap, s/AMBControl/service, s/AMBControl/shrinkp, s/Arthur2, s/Arthur3, s/ArthurSWIs, s/ChangeDyn, s/ExtraSWIs, s/HAL, s/HeapMan, s/Kernel, s/MemInfo, s/Middle, s/ModHand, s/MoreSWIs, s/MsgCode, s/NewIRQs, s/NewReset, s/Oscli, s/PMF/buffer, s/PMF/IIC, s/PMF/i2cutils, s/PMF/key, s/PMF/mouse, s/PMF/osbyte, s/PMF/oseven, s/PMF/osinit, s/PMF/osword, s/PMF/oswrch, s/SWINaming, s/Super1, s/SysComms, s/TickEvents, s/Utility, s/vdu/vdu23, s/vdu/vdudriver, s/vdu/vdugrafl, s/vdu/vdugrafv, s/vdu/vdupalxx, s/vdu/vdupointer, s/vdu/vduswis, s/vdu/vduwrch - Lots of updates to deal with zero page relocation
        - s/ARM600 - UseProcessTransfer option. Zero page relocation support. Deleted pre-HAL ClearPhysRAM code to tidy the file up a bit.
        - s/ARMops - Zero page relocation support. Set CPUFlag_HiProcVecs when high vectors are in use.
        - s/KbdResPC - Disable compilation of dead code
        - s/VMSAv6 - UseProcessTransfer option. Zero page relocation support.
      Admin:
        Tested with OMAP & Iyonix ROM softloads, both with high & low zero page.
        High zero page hasn't had extensive testing, but boot sequence + ROM apps seem to work.
      
      
      Version 5.35, 4.79.2.98.2.48. Tagged as 'Kernel-5_35-4_79_2_98_2_48'
      2247d8e9
  2. 27 Jun, 2001 1 commit
    • Mike Stephens's avatar
      StrongARM is back, and this time it's provisional! · f39e1298
      Mike Stephens authored
      IOMD HAL:
        enables fast clock for StrongARM on Medusa h/w
      
      Kernel:
        ARMops for StrongARM implemented. Tested moderately on
        HAL/32-bit minimal desktop build for Risc PC. Could do
        with more testing later. eg. does reentrant cache
        cleaning support really work?
        Lazy task swapping is enabled for revT or later, wahey.
      
      Version 5.35, 4.79.2.42. Tagged as 'Kernel-5_35-4_79_2_42'
      f39e1298
  3. 22 May, 2001 1 commit
    • Mike Stephens's avatar
      Reimplement Lazy task swapping, an amusing idea from Ursula, would have done... · bdc4f843
      Mike Stephens authored
      Reimplement Lazy task swapping, an amusing idea from Ursula, would have done it sooner but couldn't be bothered (humour).
      
      Currently activates for all ARMs flagged as base-restored
      abort model. No handling of eg. StrongARM pre-revT bug, but
      then the kernel no longer runs on StrongARM (progress).
      Still some details to fix: all aborts in current app space
      assumed to be missing pages, but this must be fixed to
      handle abort code in app space, things like debuggers
      marking code read only.
      
      Plus, small fixes:
        OS_Memory 8 returns vaguely useful info for RAM,VRAM
        in HAL build (temporary partial implementation)
        Broken handling of old BBC commands with (fx,tv etc)
        with no spaces fixed (fudgeulike code from Ursula,
        now 32-bit).
      
      Version 5.35, 4.79.2.31. Tagged as 'Kernel-5_35-4_79_2_31'
      bdc4f843
  4. 10 Nov, 2000 1 commit
  5. 06 Nov, 1996 1 commit