- 30 Nov, 2002 1 commit
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Ben Avison authored
Detail: Lots of changes since last version, at least the following: * Updated OS timestamp, removed alpha status * Negative INKEY OS version changed to &AA * GraphicsV is now alocated vector number &2A * ROM moved up to &FC000000 * Max application slot increased to 512 Mbytes (for now) * Max size of RMA increased to 256 Mbytes * RMA is now first-created dynamic area (so it gets lowest address after top of application slot) * OS_Memory 10 reimplemeted * New OS_ReadSysInfo 6 values 18-22 added * OS_ReadSysInfo 8 gains flag bit to indicate soft power-off * Misc internal top-bit-set-address fixes * *ChangeDynamicArea can take sizes in megabytes or gigabytes * Magic word "&off" in R0 passed to OS_Reset powers down if possible * Added acceleration: block copy; CLS; text window scroll up; rectangle fill * Disabled LED flashing in page mode (liable to crash) * Masked sprite plot and VDU 5 text avoids reading the screen if possible * Framestore made USR mode accessible * Fix for VDU 5,127 bug - now relies on font definitions being in extreme quarters of memory, rather than bottom half * Allocated 64-bit OS_Convert... SWIs * IIC errors use allocated error numbers * Looks for Dallas RTC before Philips RTC because we're using a Philips NVRAM device with the same ID * Fix to bug that meant the oscillator in the Dallas RTC wasn't enabled * Default mouse type (USB) changed to allocated number * Ram disc max size increased to 128 Mbytes (Ursula merge) and made cacheable for StrongARMs (not XScale) * Branch through zero handler now works in USR mode, by use of a trampoline in the system stack to allow PC-relative register storage * Address exception handler changed to not use 0 as workspace * OS_Memory 13 extended to allow specification of cacheability and access privileges * Added OS_Memory 16 to return important memory addresses * RISCOS_MapInIO() takes cacheable flag in bit 3, access permissions in bits 10 and 11, doubly-mapped flag in bit 20, and access permissions specified flag in bit 21 * Bug fix in last version for application abort handlers didn't quite work; register shuffle required * "Module is not 32-bit compatible" error now reports the module name * Default configured language changed from 10 to 11 (now Desktop again) Version 5.35, 4.79.2.51. Tagged as 'Kernel-5_35-4_79_2_51'
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- 18 Jun, 2001 1 commit
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Mike Stephens authored
Ursula. Quite a hairy code merge really, so let's hope it is worth it to someone. What you get (back after 2 or 3 years): - much more efficient for largish numbers of DAs (relevance to current build = approx 0) - fancy reason codes to support fast update of Switcher bar display (relevance = 0) - support for clamped maximum area sizes, to avoid address space exhaustion with big memory (relevance = 0) - better implementation of shrinkable DAs, performance wise (if lots of DAs, relevance = approx 0) - support for 'Sparse' DAs. Holey dynamic areas, Batman! (relevance, go on someone use the darned things) Moderately development tested on HAL/32bit ARM9 desktop. Note the Switcher should be compiled to use the new reason codes 6&7, for fabled desktop builds. Also, during this work, so I could see the wood for the trees, redid some source code clean up, removing pre-Medusa stuff (like I did about 3 years ago on Ursula, sigh). That's why loads of source files have changed. The new DA stuff is confined pretty much to hdr.KernelWS and s.ChangeDyn. Ta. Version 5.35, 4.79.2.38. Tagged as 'Kernel-5_35-4_79_2_38'
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- 05 Nov, 1996 1 commit
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Neil Turton authored
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