Fix bug when creating code variables via OS_SetVarVal, remove errant line from...

Fix bug when creating code variables via OS_SetVarVal, remove errant line from s.ARM600, automatically enable alignment exceptions if NoUnaligned is TRUE (Cortex branch)

Detail:
  s/ARM600 - Removed an errant line that could have caused problems if the ARM600 MMU model was used with the WB_CR7_Lx cache type
  s/Arthur2 - OS_SetVarVal was failing to call XOS_SynchroniseCodeAreas after copying the code variables code block into the system heap. This has now been fixed.
  s/HAL - Alignment exceptions are now automatically enabled when the kernel is built with the NoUnaligned option turned on.
Admin:
  Tested on rev C2 beagleboard. OS_SetVarVal fix means the Debugger module now shows the right register names instead of ofla!


Version 5.35, 4.79.2.98.2.15. Tagged as 'Kernel-5_35-4_79_2_98_2_15'

VersionASM

@@ -13,11 +13,11 @@
                         GBLS    Module_ComponentPath
 Module_MajorVersion     SETS    "5.35"
 Module_Version          SETA    535
-Module_MinorVersion     SETS    "4.79.2.98.2.14"
-Module_Date             SETS    "22 Oct 2009"
-Module_ApplicationDate  SETS    "22-Oct-09"
+Module_MinorVersion     SETS    "4.79.2.98.2.15"
+Module_Date             SETS    "06 Nov 2009"
+Module_ApplicationDate  SETS    "06-Nov-09"
 Module_ComponentName    SETS    "Kernel"
 Module_ComponentPath    SETS    "castle/RiscOS/Sources/Kernel"
-Module_FullVersion      SETS    "5.35 (4.79.2.98.2.14)"
-Module_HelpVersion      SETS    "5.35 (22 Oct 2009) 4.79.2.98.2.14"
+Module_FullVersion      SETS    "5.35 (4.79.2.98.2.15)"
+Module_HelpVersion      SETS    "5.35 (06 Nov 2009) 4.79.2.98.2.15"
                         END

VersionNum

@@ -5,19 +5,19 @@
  *
  */
 #define Module_MajorVersion_CMHG        5.35
-#define Module_MinorVersion_CMHG        4.79.2.98.2.14
-#define Module_Date_CMHG                22 Oct 2009
+#define Module_MinorVersion_CMHG        4.79.2.98.2.15
+#define Module_Date_CMHG                06 Nov 2009
 
 #define Module_MajorVersion             "5.35"
 #define Module_Version                  535
-#define Module_MinorVersion             "4.79.2.98.2.14"
-#define Module_Date                     "22 Oct 2009"
+#define Module_MinorVersion             "4.79.2.98.2.15"
+#define Module_Date                     "06 Nov 2009"
 
-#define Module_ApplicationDate          "22-Oct-09"
+#define Module_ApplicationDate          "06-Nov-09"
 
 #define Module_ComponentName            "Kernel"
 #define Module_ComponentPath            "castle/RiscOS/Sources/Kernel"
 
-#define Module_FullVersion              "5.35 (4.79.2.98.2.14)"
-#define Module_HelpVersion              "5.35 (22 Oct 2009) 4.79.2.98.2.14"
+#define Module_FullVersion              "5.35 (4.79.2.98.2.15)"
+#define Module_HelpVersion              "5.35 (06 Nov 2009) 4.79.2.98.2.15"
 #define Module_LibraryVersionInfo       "5:35"

s/ARM600

@@ -3556,7 +3556,6 @@ SyncCodeAreasRange
         MOVEQ   r2, #4
         MOVEQ   lr, r2, LSL lr
         MOVEQ   r2, #0
-        LDRB    lr, [r2, #DCache_LineLen]
         SUB     lr, lr, #1
         ADD     r1, r1, lr                 ;rounding up end address
         MVN     lr, lr

s/Arthur2

@@ -1486,6 +1486,7 @@ SetVarVal_GotInitialLength
         TEQ     r10, #VarType_Code
         ADDEQ   r4, r4, #3
         BICEQ   r4, r4, #3
+        Push    "r4",EQ ; Remember start of code block for code variables
         TEQNE   r10, #VarType_Number
         BEQ     SetVarVal_CopyR1BytesToR4
 
@@ -1500,15 +1501,24 @@ SetVarVal_GotInitialLength
         MOV     r1, r1, ROR #16
         ADDEQ   r1, r1, #1                      ; undo ghastly fudge
 
-SetVarVal_CopyR1BytesToR4
         B       %FT35
 30
         LDRB    lr, [r5], #1
         STRB    lr, [r4], #1
 35
+SetVarVal_CopyR1BytesToR4
         SUBS    r1, r1, #1
         BHS     %BT30
 
+        TEQ     r10, #VarType_Code
+        BNE     SetVarVal_NewNodeReady
+
+        Pull    "r1" ; Grab pointer to start of code block
+        Push    "r0,r2"
+        MOV     r0,#1
+        MOV     r1,r4
+        SWI     XOS_SynchroniseCodeAreas
+        Pull    "r0,r2"
         B       SetVarVal_NewNodeReady
 
 SetVarVal_FillInString

s/HAL

@@ -684,6 +684,9 @@ MMU_activation_zone
         BICGE   v5, v5, #MMUC_EE+MMUC_TE+MMUC_VE ; Exceptions = nonvectored LE ARM
         CMP     ip, #0
   ]
+  [ NoUnaligned
+        ORR     v5, v5, #MMUC_A ; Alignment exceptions on
+  ]
 MMUon_instr
         ARM_write_control v5
         MOVEQ   sp, v5