Commit c9f6a232 authored by Kevin Bracey's avatar Kevin Bracey
Browse files

OS_ReadSysInfo 2 now reports whether the IIC bus is fast (in bit 24 of R2),...

OS_ReadSysInfo 2 now reports whether the IIC bus is fast (in bit 24 of R2), and whether I/O clocks should be stopped when idling the processor (bit 25).

OS_Byte 19 is a bit more careful in its use of Portable_Idle - an edge case
where the vsync interrupt was already pending now returns immediately.

Version 5.07. Tagged as 'Kernel-5_07'
parent 9eefa962
......@@ -6,9 +6,9 @@
GBLS Module_MinorVersion
GBLS Module_Date
GBLS Module_FullVersion
Module_MajorVersion SETS "5.06"
Module_Version SETA 506
Module_MajorVersion SETS "5.07"
Module_Version SETA 507
Module_MinorVersion SETS ""
Module_Date SETS "01 Nov 1999"
Module_FullVersion SETS "5.06"
Module_Date SETS "02 Nov 1999"
Module_FullVersion SETS "5.07"
END
/* (5.06)
/* (5.07)
*
* This file is automatically maintained by srccommit, do not edit manually.
*
*/
#define Module_MajorVersion_CMHG 5.06
#define Module_MajorVersion_CMHG 5.07
#define Module_MinorVersion_CMHG
#define Module_Date_CMHG 01 Nov 1999
#define Module_Date_CMHG 02 Nov 1999
#define Module_MajorVersion "5.06"
#define Module_Version 506
#define Module_MajorVersion "5.07"
#define Module_Version 507
#define Module_MinorVersion ""
#define Module_Date "01 Nov 1999"
#define Module_Date "02 Nov 1999"
#define Module_FullVersion "5.06"
#define Module_FullVersion "5.07"
......@@ -1145,17 +1145,18 @@ ReadSysInfo_Code ROUT
; 0 => absent
; 1 => present (type 1) eg A4 portable
; 2 => present (type 2) eg Stork portable
[ MorrisSupport
; bits 8-15 = IOMD variant
; 0 => IOMD
; 1 => IOMDL ie ARM7500 (Morris)
; bits 16-23 = VIDC20 variant
; 0 => VIDC20
; 1 => VIDC2L ie ARM7500 (Morris)
; bits 24-31 reserved (set to 0)
|
; bits 8-31 reserved (set to 0)
]
; bits 24-31 = miscellaneous flags
; bit 24 0 => IIC bus slow (100kHz)
; 1 => IIC bus fast (400kHz)
; bit 25 0 => keep I/O clocks running during idle
; 1 => stop I/O clocks during idle
; bits 26-31 reserved (set to 0)
; r3 = word 0 of unique machine ID, or 0 if unavailable
; r4 = word 1 of unique machine ID, or 0 if unavailable
......@@ -1191,6 +1192,16 @@ IOST_BATMAN * 64 ;Stork keyboard/battery controller seems to be present
TST r0, #IOST_7500
ORRNE r2, r2, #&00000100 ;NE, Morris based machine with IOMDL
ORRNE r2, r2, #&00010000 ;NE, and VIDC2L
]
[ ClockNVMemoryFast
MOV r1, #0
LDRB r1, [r1, #NVRamSpeed]
SUB r1, r1, #1 ; catch zero = slow (just in case)
CMP r1, #3-1 ; speed is 3 for 400kHz, 10 for 100kHz.
ORRLS r2, r2, #&01000000 ; indicate fast speed
]
[ StopClocksDuringIdle
ORR r2, r2, #&02000000
]
ANDS r1, r0, #IOST_COMBOMASK
MOVNE r1, #1 ; make r1 0 or 1
......
......@@ -657,7 +657,7 @@ Osbyte13 ROUT
TEQ R0, #0 ; NE => blanked
TSTNE R1, #1 ; NE => blanked and DPMS turned off HSyncs
BNE %FT20 ; if true exit immediately
MyOsbyte NE ; if true exit immediately
LDRB R2, CFStime
10
......@@ -665,13 +665,7 @@ Osbyte13 ROUT
;StrongARM core will not see interrupt unless disable is cleared for at least 5 cycles,
;in order to fill synchroniser pipe
[ StorkPowerSave
NOP
MOV R0, #0
LDRB R0, [R0, #PortableFlags]
TST R0, #PortableFeature_Idle
SWINE XPortable_Idle
|
[ StrongARM
NOP
NOP
NOP
......@@ -682,9 +676,19 @@ Osbyte13 ROUT
TEQP R3, #0 ; SEI
LDRB R1, CFStime
TEQ R1, R2
BEQ %BT10
20
MyOsbyte
MyOsbyte NE
[ StorkPowerSave
; It is actually better to call Idle with interrupts disabled as it stops us the interrupt
; going off on the way through the SWI dispatch and accidentally waiting for the next
; interrupt... The Idle will return when an interrupt is pending - it will be handled when
; we branch back up and enable interrupts.
MOV R0, #0
LDRB R0, [R0, #PortableFlags]
TST R0, #PortableFeature_Idle
SWINE XPortable_Idle
]
B %BT10
; *****************************************************************************
......
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