Commit 87114d6d authored by Kevin Bracey's avatar Kevin Bracey
Browse files

Parallel port flash upgrade facility added.

Version 4.72. Tagged as 'Kernel-4_72'
parent 29428883
......@@ -5,8 +5,10 @@
GBLA Module_Version
GBLS Module_MinorVersion
GBLS Module_Date
Module_MajorVersion SETS "4.71"
Module_Version SETA 471
GBLS Module_FullVersion
Module_MajorVersion SETS "4.72"
Module_Version SETA 472
Module_MinorVersion SETS ""
Module_Date SETS "25 Feb 1999"
END
Module_Date SETS "08 Apr 1999"
Module_FullVersion SETS "4.72"
END
/* (4.71)
/* (4.72)
*
* This file is automatically maintained by srccommit, do not edit manually.
*
*/
#define Module_MajorVersion_CMHG 4.71
#define Module_MajorVersion_CMHG 4.72
#define Module_MinorVersion_CMHG
#define Module_Date_CMHG 25 Feb 1999
#define Module_Date_CMHG 08 Apr 1999
#define Module_MajorVersion "4.71"
#define Module_Version 471
#define Module_MajorVersion "4.72"
#define Module_Version 472
#define Module_MinorVersion ""
#define Module_Date "25 Feb 1999"
#define Module_Date "08 Apr 1999"
#define Module_FullVersion "4.72"
This diff is collapsed.
......@@ -217,6 +217,9 @@ IncludeTestSrc SETL {FALSE} :LAND: :LNOT: STB
GBLL RO371Timings
RO371Timings SETL :LNOT: STB
; For development on Customer M hardware only
GBLL ParallelFlashUpgrade
ParallelFlashUpgrade SETL {FALSE}
[ :LNOT: RO371Timings
......@@ -484,6 +487,12 @@ ProcessorVectors SETL {TRUE} ; Processor vectors indirected t
GetUnsqueeze SETS "GET s.Unsqueeze"
|
GetUnsqueeze SETS ""
]
GBLS GetFlashROM
[ ParallelFlashUpgrade
GetFlashROM SETS "GET s.FlashROM"
|
GetFlashROM SETS ""
]
GBLS GetPublicWS
GBLS GetWorkspace
......@@ -630,6 +639,7 @@ largest_rma_size * (128*1024) ; and the ceiling for rma use
GET s.Copro15ops ; some macros
GET s.Kernel
$GetFlashROM
GET s.NewIRQs
GET s.Oscli
GET s.SysComms
......
......@@ -20,7 +20,6 @@
MorrisHeaderCodeSize * (24*4) ;Code occupies less than this, we pad to this boundary so POST code
;has a nicely defined place for its romsize and code entry points
[ 1 = 1
; VECTOR AREA:
LDR pc, .+ResetIndirection
......@@ -44,43 +43,20 @@ MorrisHeaderCodeSize * (24*4) ;Code occupies less than this, we pad to this bo
; produced in 16-in-32 form by extracting hex values from a listing...
DCD &0000B632, &0000E3A0 ; 20: MOV R11, #IO+IOMDREGS - point at IOMD
DCD &00000000, &0000E3A0 ; 24: MOV R0, #&0 - ROMCR:32b,slow,218.75us,no burst
DCD &00000080, &0000E5CB ; 28: STRB R0,[R11,#ROMCR0] - switch mode
DCD &0000F000, &0000E3A0 ; 2C: MOV PC, #0 - jump to 0 (this instr pre-fetched)
DCD &00000000, &0000E3A0 ; 28: MOV R0, #&0 - ROMCR:32b,slow,218.75us,no burst
DCD &00000080, &0000E5CB ; 30: STRB R0,[R11,#ROMCR0] - switch mode
[ :LNOT: ParallelFlashUpgrade
DCD &0000F000, &0000E3A0 ; 38: MOV PC, #0 - jump to 0 (this instr pre-fetched)
|
;
; Kludged to cope with Morris Bugs
;
! 0,"<><><><><><><> This kernel version will not softload on a Risc PC <><><><><><><>"
DCD &E3A0F010
DCD &FFFFE3A0
DCD &E59FF034
DCD &E59FF034
DCD &E59FF034
DCD &E59FF034
DCD &E59FF034
DCD &E59FF034
DCD &E3A0B632
DCD &E3A0E3A0 ; 20: MOV R11, #IO+IOMDREGS - point at IOMD
DCD &E3A00000
DCD &E3A0E3A0 ; 24: MOV R0, #&0 - ROMCR:32b,slow,218.75us,no burst
DCD &E5CB0080
DCD &E3A0E5CB ; 28: STRB R0,[R11,#ROMCR0] - switch mode
DCD &E59FF0F4
DCD &E5CBE59F ; 2C: MOV PC, #0 - jump to 0 (this instr pre-fetched)
; At this point, we know that we're in an ARM 7500-based box with 32-bit ROMs that's
; just been powered up. These are the conditions under which we may wish to reprogram
; ourselves.
CFR_Offset * (ConsiderFlashROM - ROM - ((.-ROM)/2) - 8)/4
DCD CFR_Offset :AND: &FFFF ; 38: B ConsiderFlashROM (this instr pre-fetched)
DCD &0000EA00 + (CFR_Offset:SHR:16)
]
; vector absolute targets for use from physical vector instructions
; vector absolute targets for use from physical vector instructions
UNDEF_VEC DCD UndInstInReset-ROM
SWI_VEC DCD SWIInReset -ROM
......
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