Commit 247389ac authored by Kevin Bracey's avatar Kevin Bracey
Browse files

Kernel now always assumes that 4K and 8K ATMEL EEPROM devices have their top...

Kernel now always assumes that 4K and 8K ATMEL EEPROM devices have their top quarter write protected, even if IOMD_C_EEPROMProtect isn't set.

Version 5.10. Tagged as 'Kernel-5_10'
parent 6760ce30
......@@ -6,9 +6,9 @@
GBLS Module_MinorVersion
GBLS Module_Date
GBLS Module_FullVersion
Module_MajorVersion SETS "5.09"
Module_Version SETA 509
Module_MajorVersion SETS "5.10"
Module_Version SETA 510
Module_MinorVersion SETS ""
Module_Date SETS "20 Jan 2000"
Module_FullVersion SETS "5.09"
Module_Date SETS "26 Jan 2000"
Module_FullVersion SETS "5.10"
END
/* (5.09)
/* (5.10)
*
* This file is automatically maintained by srccommit, do not edit manually.
*
*/
#define Module_MajorVersion_CMHG 5.09
#define Module_MajorVersion_CMHG 5.10
#define Module_MinorVersion_CMHG
#define Module_Date_CMHG 20 Jan 2000
#define Module_Date_CMHG 26 Jan 2000
#define Module_MajorVersion "5.09"
#define Module_Version 509
#define Module_MajorVersion "5.10"
#define Module_Version 510
#define Module_MinorVersion ""
#define Module_Date "20 Jan 2000"
#define Module_Date "26 Jan 2000"
#define Module_FullVersion "5.09"
#define Module_FullVersion "5.10"
......@@ -1583,9 +1583,7 @@ InitCMOSCache ENTRY "r0-r6"
MOV r0, #E2ROMAddress4K
BL DummyAccess
MOVVC R4, #16
[ IOMD_C_EEPROMProtect <> 0
MOVVC R6, #12 ; Only bottom 3K writable
]
MOVVC R5, #5 ; 32 byte page size
[ ClockNVMemoryFast
MOVVC R3, #3 ; Fast speed setting (1.5s delays)
......@@ -1598,9 +1596,7 @@ InitCMOSCache ENTRY "r0-r6"
MOV r0, #E2ROMAddress8K
BL DummyAccess
MOVVC R4, #32
[ IOMD_C_EEPROMProtect <> 0
MOVVC R6, #24 ; Only bottom 6K writable
]
MOVVC R5, #5 ; 32 byte page size
[ ClockNVMemoryFast
MOVVC R3, #3 ; Fast speed setting (1.5s delays)
......
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