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Commit 0821a76d authored by Kevin Bracey's avatar Kevin Bracey
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Up to 16M of ROM now mapped in from 03800000-04800000. 

Video memory now limited to 8M (instead of 16M) to make room.
OS_Memory 7 now reports ROM correctly when the image is >4M.

Version 4.76. Tagged as 'Kernel-4_76'
parent 717c86f3
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Showing with 37 additions and 35 deletions
VersionASM
View file @ 0821a76d
......@@ -6,9 +6,9 @@
GBLS Module_MinorVersion
GBLS Module_Date
GBLS Module_FullVersion
Module_MajorVersion SETS "4.75"
Module_Version SETA 475
Module_MajorVersion SETS "4.76"
Module_Version SETA 476
Module_MinorVersion SETS ""
Module_Date SETS "14 Apr 1999"
Module_FullVersion SETS "4.75"
Module_Date SETS "30 Apr 1999"
Module_FullVersion SETS "4.76"
END
VersionNum
View file @ 0821a76d
/* (4.75)
/* (4.76)
*
* This file is automatically maintained by srccommit, do not edit manually.
*
*/
#define Module_MajorVersion_CMHG 4.75
#define Module_MajorVersion_CMHG 4.76
#define Module_MinorVersion_CMHG
#define Module_Date_CMHG 14 Apr 1999
#define Module_Date_CMHG 30 Apr 1999
#define Module_MajorVersion "4.75"
#define Module_Version 475
#define Module_MajorVersion "4.76"
#define Module_Version 476
#define Module_MinorVersion ""
#define Module_Date "14 Apr 1999"
#define Module_Date "30 Apr 1999"
#define Module_FullVersion "4.75"
#define Module_FullVersion "4.76"
s/ARM600
View file @ 0821a76d
......@@ -1639,8 +1639,8 @@ NoDRAMPanic
CMP r10, r11 ; Was this the only block? If so, leave 1M
SUBEQS r7, r7, #1024*1024
MOVCC r7, r5, ASR #1 ; If that overflowed, take half the bank.
CMP r7, #16*1024*1024
MOVCS r7, #16*1024*1024 ; Limit allocation to 16M - the size of the logical space
CMP r7, #8*1024*1024
MOVCS r7, #8*1024*1024 ; Limit allocation to 8M - the size of the logical space
ADD r4, r4, r7 ; Adjust the DRAM block base...
SUBS r5, r5, r7 ; ... and the size.
......@@ -2322,15 +2322,20 @@ MemInitTable ; sz, U, C, B, logaddr, (ap, (physaddr))
MemInitSection 1, 1, 0, 0, &03500000, AP_None, &03400000 ; VIDC20 space
MemInitSection 2, 1, 0, 0, &03600000, AP_None, &03600000 ; LAGs
[ STB
[ ExtROMSupport ; System build option
ASSERT (OSROM_ImageSize <= 4096) ; No room for extension ROMs with an 8MB OS image
[ OSROM_ImageSize >= 8192
; We will map in the whole ROM, but only the first 8M will fall in the 26-bit
; address space, and be available for modules.
MemInitROMs (OSROM_ImageSize / 1024), 1, 1, 1, &03800000, AP_Read
|
[ STB
[ ExtROMSupport ; System build option
ASSERT (OSROM_ImageSize <= 4096) ; No room for extension ROMs with an 8MB OS image
MemInitROMs 4, 1, 1, 1, &03800000, AP_Read ; ROM
MemInitSection 4, 1, 1, 1, &03C00000, AP_Read, &01000000 ; Extension ROM
|
MemInitROMs 8, 1, 1, 1, &03800000, AP_Read ; ROM (1st or 2nd bank)
]
|
MemInitROMs 8, 1, 1, 1, &03800000, AP_Read ; ROM (1st or 2nd bank)
]
|
[ OSROM_ImageSize = 4096
MemInitROMs 4, 1, 1, 1, &03800000, AP_Read ; ROM
MemInitROMs 4, 1, 1, 1, &03C00000, AP_Read ; ROM
......@@ -2341,6 +2346,7 @@ MemInitTable ; sz, U, C, B, logaddr, (ap, (physaddr))
MemInitROMs 2, 1, 1, 1, &03E00000, AP_Read ; ROM
]
]
]
[ :LNOT: NewStyle_Screen
MemInitVideo 16, 1, 0, 1, &05000000, AP_None ; real screen (section-mapped)
......@@ -3766,7 +3772,11 @@ L1L2PTenhancements ROUT
BEQ L1L2PTe_WPROMdone ;ARM 610 has no R bit, for example
LDR r0,=L1PT
ADD r0,r0,#ROM :SHR: (20-2) ;address of first L1PT entry for ROM space
[ OSROM_ImageSize > 8192
MOV r1,#OSROM_ImageSize / 1024
|
MOV r1,#8 ;8 entries (8 Mbytes)
]
L1L2PTe_WPROMloop
LDR r2,[r0]
BIC r2,r2,#&C00 ;set AP (access permission) bits to 00
......
s/ChangeDyn
View file @ 0821a76d
......@@ -2333,7 +2333,11 @@ FixedAreasTable ; table of fixed areas (
& UndStackSoftCamChunk, 1024*1024 ; undefined stack / soft cam map
& CursorChunkAddress, 64*1024 ; 32K for cursor, 32K for "nowhere"
& L2PT, 4*1024*1024 ; L2PT (and L1PT)
[ OSROM_ImageSize > 8192
& &03000000, 8*1024*1024+OSROM_ImageSize*1024 ; I/O + ROM
|
& &03000000, 16*1024*1024 ; I/O + ROM
]
[ :LNOT: NewStyle_Screen
& ScreenEndAdr-16*1024*1024, 32*1024*1024 ; Screen (removable later)
]
......
s/MemInfo
View file @ 0821a76d
......@@ -366,27 +366,15 @@ MemoryPhysSize
MemoryReadPhys ROUT
ENTRY "r1-r10"
[ OSROM_ImageSize = 4096
; &00000000 to &00400000 is ROM.
MOV r2, #(&00400000-&00000000) :SHR: WordShift
; &00000000 to OSROM_ImageSize*1024 is ROM.
MOV r2, #(OSROM_ImageSize*1024-&00000000) :SHR: WordShift
LDR r3, =ROM_Pattern :OR: NotAvailable
BL fill_words
; &00400000 to &02000000 is allocated to ROM but is not present.
MOV r2, #(&02000000-&00400000) :SHR: WordShift
; OSROM_ImageSize*1024 to &02000000 is allocated to ROM but is not present.
MOV r2, #(&02000000-OSROM_ImageSize*1024) :SHR: WordShift
LDR r3, =NotPresent :OR: NotAvailable
BL fill_words
|
; &00000000 to &00200000 is ROM.
MOV r2, #(&00200000-&00000000) :SHR: WordShift
LDR r3, =ROM_Pattern :OR: NotAvailable
BL fill_words
; &00200000 to &02000000 is allocated to ROM but is not present.
MOV r2, #(&02000000-&00200000) :SHR: WordShift
LDR r3, =NotPresent :OR: NotAvailable
BL fill_words
]
; &02000000 to &02200000 is VRAM or not present.
MOV r4, #0
......
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