• Jeffrey Lee's avatar
    Add zero page relocation support · 2247d8e9
    Jeffrey Lee authored
    Detail:
      A whole mass of changes to add high processor vectors + zero page relocation support to the Cortex branch of the kernel
      At the moment the code can only cope with two ZeroPage locations, &0 and &FFFF0000. But with a bit more tweaking those restrictions can probably be lifted, allowing ZeroPage to be hidden at almost any address (assuming it's fixed at compile time). If I've done my job right, these restrictions should all be enforced by asserts.
      There's a new option, HiProcVecs, in hdr/Options to control whether high processor vectors are used. When enabling it and building a ROM, remember:
      * FPEmulator needs to be built with the FPEAnchor=High option specified in the components file (not FPEAnchorType=High as my FPEmulator commit comments suggested)
      * ShareFS needs unplugging/removing since it can't cope with it yet
      * Iyonix users will need to use the latest ROOL boot sequence, to ensure the softloaded modules are compatible (OMAP, etc. don't really softload much so they're OK with older sequences)
      * However VProtect also needs patching to fix a nasty bug there - http://www.riscosopen.org/tracker/tickets/294
      The only other notable thing I can think of is that the ProcessTransfer code in s/ARM600 & s/VMSAv6 is disabled if high processor vectors are in use (it's fairly safe to say that code is obsolete in HAL builds anyway?)
      Fun challenge for my successor: Try setting ZeroPage to &FFFF00FF (or similar) so its value can be loaded with MVN instead of LDR. Then use positive/negative address offsets to access the contents.
      File changes:
      - hdr/ARMops - Modified ARMop macro to take the ZeroPage pointer as a parameter instead of 'zero'
      - hdr/Copro15ops - Corrected $quick handling in myISB macro
      - hdr/Options - Added ideal setting for us to use for HiProcVecs
      - s/AMBControl/allocate, s/AMBControl/growp, s/AMBControl/mapslot, s/AMBControl/memmap, s/AMBControl/service, s/AMBControl/shrinkp, s/Arthur2, s/Arthur3, s/ArthurSWIs, s/ChangeDyn, s/ExtraSWIs, s/HAL, s/HeapMan, s/Kernel, s/MemInfo, s/Middle, s/ModHand, s/MoreSWIs, s/MsgCode, s/NewIRQs, s/NewReset, s/Oscli, s/PMF/buffer, s/PMF/IIC, s/PMF/i2cutils, s/PMF/key, s/PMF/mouse, s/PMF/osbyte, s/PMF/oseven, s/PMF/osinit, s/PMF/osword, s/PMF/oswrch, s/SWINaming, s/Super1, s/SysComms, s/TickEvents, s/Utility, s/vdu/vdu23, s/vdu/vdudriver, s/vdu/vdugrafl, s/vdu/vdugrafv, s/vdu/vdupalxx, s/vdu/vdupointer, s/vdu/vduswis, s/vdu/vduwrch - Lots of updates to deal with zero page relocation
      - s/ARM600 - UseProcessTransfer option. Zero page relocation support. Deleted pre-HAL ClearPhysRAM code to tidy the file up a bit.
      - s/ARMops - Zero page relocation support. Set CPUFlag_HiProcVecs when high vectors are in use.
      - s/KbdResPC - Disable compilation of dead code
      - s/VMSAv6 - UseProcessTransfer option. Zero page relocation support.
    Admin:
      Tested with OMAP & Iyonix ROM softloads, both with high & low zero page.
      High zero page hasn't had extensive testing, but boot sequence + ROM apps seem to work.
    
    
    Version 5.35, 4.79.2.98.2.48. Tagged as 'Kernel-5_35-4_79_2_98_2_48'
    2247d8e9
mapslot 4.52 KB
; Copyright 1996 Acorn Computers Ltd
;
; Licensed under the Apache License, Version 2.0 (the "License");
; you may not use this file except in compliance with the License.
; You may obtain a copy of the License at
;
;     http://www.apache.org/licenses/LICENSE-2.0
;
; Unless required by applicable law or agreed to in writing, software
; distributed under the License is distributed on an "AS IS" BASIS,
; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
; See the License for the specific language governing permissions and
; limitations under the License.
;
; > s.mapslot

; handle mapping of entire slot in or out (bit 8 of R0 clear)
; or mapping of some of slot (bit 8 of R0 set)

; entry:
;     R0 = bits 0..7 = 3 (reason code 3); bit 8 set for mapsome
;     R1 = start (logical) address; 0 means application start; -1 means map out
;     R2 = handle
;     R3,R4 used if bit 8 set - see mapsome
;
; Note that if bit 8 is clear, the use is restricted to mapping in or out of
; whole slots only. Hence if bit 8 is clear, behaviour is undefined unless
; R1 is one of: 0, &8000 or -1.
;
mapslot

;  Debug AMB,"mapslot",r0,r1,r2,r3,r4

        TST     R0,#&100   ;if bit 8 set, then mapsome
        BNE     mapsome

        Push    "R0-R6,LR"

        MOVS    R5,R1                    ;save entry R1
        MOVEQ   R5,#ApplicationStart     ;0 means application start

      [ ValidateAMBHandles
        ;validate handle
        LDR     R0,AMBNhandles
        CMP     R2,R0
        BGT     badmapslot
        CMP     R2,#1
        BLT     badmapslot
      ]

        LDR     R0,AMBNodeHandles   ; R0 -> handle array
        LDR     R1,[R0,R2,LSL #2]   ; R1 -> node

      [ ValidateAMBHandles
        ;check we have a proper id for node handle
        LDR     R3,=AMBMagicNodeID
        LDR     LR,[R1,#AMBNode_id]
        CMP     LR,R3
        BNE     badmapslot
      ]

        LDR     R3,[R1,#AMBNode_Npages]
        ADD     R4,R1,#AMBNode_pages

;;;actually, we can have 0 page slots (eg. sometimes from pinboard)
;;;        CMP     R3,#0
;;;        BEQ     ms_done                   ;should not happen


        LDR   R2,AMBMappedInNode
        CMP   R1,R2
        CMPEQ R5,#-1
        BEQ   ms_domap     ;do map if already mapped in, and asked to map out

        CMP   R1,R2
        CMPNE R5,#-1
        BEQ   ms_done      ;else do map only if not already mapped in, and asked to map in

ms_domap
        CMP     R5,#-1                      ;EQ if it is a map out
        LDREQ   R6,=DuffEntry
        MOVNE   R6,#ApplicationStart
        STR     R6,[R1,#AMBNode_startaddr]
        MOVEQ   R6,#AP_Duff
        MOVNE   R6,#0
        STR     R6,[R1,#AMBNode_PPL]

  [ AMB_LazyMapIn
        LDRNE   R2,AMBNContextSwitches
        ADDNE   R2,R2,#1
        STRNE   R2,AMBNContextSwitches
        LDR     R2,AMBFlags
        TST     R2,#AMBFlag_LazyMapIn_disable :OR: AMBFlag_LazyMapIn_suspend
        BNE     ms_cantbelazy
        ;
        ; - if map out, do sparse map out of whole page list then zero AMBMappedInNpages
        ; - if map in, just zero AMBMappedInNpages (last map out will have cleared AMBMappedInRegister)
        ;
        MOV     R2,R5
        CMP     R2,#-1
        LDREQ   R3,AMBMappedInNpages
        ADREQ   R5,AMBMappedInRegister
        LDREQ   R6,[R1,#AMBNode_Npages]
        ;entry: R3 = no. pages mapped in, R4 -> list of page entries,
        ;       R5 -> bitmap of pages mapped in, R6=total no. of pages in page list
        BLEQ    AMB_SetMemMapEntries_SparseMapOut
        MOV     R3,#0
        STR     R3,AMBMappedInNpages
        MOV     R5,R2
        B       ms_mapdone
ms_cantbelazy
        ;entry: R3 = no. of pages, R4 -> list of page entries,
        ;       R5 := start logical address, R6 = PPL
        BL      AMB_SetMemMapEntries
ms_mapdone
  |
        ;entry: R3 = no. of pages, R4 -> list of page entries,
        ;       R5 := start logical address, R6 = PPL
        BL      AMB_SetMemMapEntries
  ]

;update AppSpace kernel stuff
        LDR     R2,[R1,#AMBNode_Npages]
        LDR     R3,=ZeroPage+AppSpaceDANode
        MOV     R0,#ApplicationStart
        CMP     R5,#-1
        ADDNE   R0,R0,R2,LSL #Log2PageSize
        STR     R0,[R3,#DANode_Size]
        LDR     R3,=ZeroPage
        STR     R0,[R3,#MemLimit]
        CMP     R5,#-1
        MOVEQ   R3,#0
        MOVNE   R3,R1
        STR     R3,AMBMappedInNode

ms_done
;;;        STRVS   R0,[SP]
        CLRV
        Pull    "R0-R6,LR"
        B       SLVK_TestV

        LTORG

      [ ValidateAMBHandles
badmapslot
        Pull    "R0-R6,LR"
        B       badhandle
      ]

    END