ReadSysInf

; > Doc.ReadSysInf

 Title:         ReadSysInf
 Author:        Tim Dobson
 Version:       0.13
 Started:       19-Mar-91
 Last updated:  25-Aug-02
 Status:        Preliminary
 History:
  19-Mar-91 TMD         Created
  04-Apr-91 TMD         Updated OS_ReadSysInfo(2)
  25-Aug-02 RPS         Boy was this out of date

Extensions to SWI OS_ReadSysInfo in RISC OS 2.11 and later versions
===================================================================

SWI OS_ReadSysInfo has been extended since RISC OS 2.00 - the full
specification is as follows:-

*****************************************************************************

        SWI OS_ReadSysInfo - Read various system information

 in:    R0 = reason code

 out:   Depends on reason code

 Reason codes:-

-------------------------------------------------------------------------

 in:    R0 = 0
 out:   R0 = amount of configured screen memory, in bytes

This sub-call is the same as on RISC OS 2.00, with the exception that two
bugs in the call have been fixed:-

 a) It no longer goes wrong if less than 20K configured on 8K or 16K page
size machine;

 b) It now properly ignores the top bit of the CMOS location holding the
configured value.

-------------------------------------------------------------------------

 in:    R0 = 1
 out:   R0 = Configured Mode/WimpMode
        R1 = Configured MonitorType
        R2 = Configured Sync

Note that from RISC OS 2.09 onwards, the configured Mode and WimpMode have
been merged. Both *Configure Mode and *Configure WimpMode control the same
CMOS RAM location.

Note also that if any of Mode/WimpMode, MonitorType or Sync have been
configured to Auto (see "Doc.MonLead"), then the appropriate value for the
attached monitor will be returned.

-------------------------------------------------------------------------

 in:   r0 = 2
 out:  r0 = hardware configuration word 0
               bits 0-7 = special functions chip type
                               0 => none
                               1 => IOEB
               bits 8-15 = I/O control chip type
                               0 => IOC
                               1 => IOMD
               bits 16-23 = memory control chip type
                               0 => MEMC1/MEMC1a
                               1 => IOMD
               bits 24-31 = video control chip type
                               0 => VIDC1a
                               1 => VIDC20
       r1 = hardware configuration word 1
               bits 0-7 = I/O chip type
                               0 => absent
                               1 => 82C710/711 or SMC'665 or similar
               bits 8-31 reserved (set to 0)
       r2 = hardware configuration word 2
               bits 0-7 = LCD controller type
                               0 => absent
                               1 => present (type 1) eg A4 portable
                               2 => present (type 2) eg Stork portable
               bits 8-15 = IOMD variant
                               0 => IOMD
                               1 => IOMDL ie ARM7500 (Morris)
               bits 16-23 = VIDC20 variant
                               0 => VIDC20
                               1 => VIDC2L ie ARM7500 (Morris)
               bits 24-31 = miscellaneous flags
                      bit 24   0 => IIC bus slow (100kHz)
                               1 => IIC bus fast (400kHz)
                      bit 25   0 => keep I/O clocks running during idle
                               1 => stop I/O clocks during idle
                      bits 26-31 reserved (set to 0)
       r3 = word 0 of unique machine ID, or 0 if unavailable
       r4 = word 1 of unique machine ID, or 0 if unavailable

Some RISC OS computers are fitted with a chip providing a machine ID number
which is unique to each computer. Machines not fitted with an ID will return
zero in both R3 and R4.

-------------------------------------------------------------------------

 in:   r0 = 3 (*** Only available from RISC OS 3.01 onwards ***)
 out:  r0 = I/O chip base features mask               710  711  665  669  UMC669
               Bits 0..3   Base IDE type              1    1    1    1    1
               Bits 4..7   Base FDC type              1    1    1    1    1
               Bits 8..11  Base parallel type         1    1    1    1    1
               Bits 12..15 Base 1st serial type       1    1    1    1    1
               Bits 16..19 Base 2nd serial type       0    1    1    1    1
               Bits 20..23 Base Config type           1    2    3    4    5
               Bits 24..31 Reserved                   0    0    0    0    0

       r1 = I/O chip extra features mask              710  711  665  669  UMC669
               Bits 0..3   IDE extra features         0    0    0    0    0
               Bits 4..7   FDC extra features         0    0    0    0    0
               Bits 8..11  parallel extra features    0    0    1    1    1
               Bits 12..15 1st serial extra features  0    0    1    1    1
               Bits 16..19 2nd serial extra features  0    0    1    1    1
               Bits 20..23 config extra features      0    0    0    0    0
               Bits 24..31 Reserved                   0    0    0    0    0

        R2-R4 Undefined (reserved for future expansion)

The 82C710 family of chips are composed of several sub-units, each of which
might change under future revisions of the chip. Current sub-units are as
follows:

        IDE hard disc interface
        Floppy disc interface
        Parallel port
        Serial port 1
        Serial port 2 (only present in 82C711)
        Chip configuration (different on 82C710 and 82C711)

New versions of the chip may have some sub-units which are incompatible with
earlier versions, while leaving the functionality of other sub-units
unchanged.

This call allows drivers which are only interested in particular sub-units
to tell whether they can work on the particular hardware running in the
machine.

Different values of each sub-field correspond to incompatible versions of
the corresponding sub-unit. A sub-field of zero indicates that the sub-unit
is not present.

If a sub-unit gains additional backwards-compatible functionality in future
versions of the chip, this will be indicated by having bits set in the value
returned in R1.

Information on extra sub-units will be accomodated in the remaining bits of
R0, or in R2-R4.

-------------------------------------------------------------------------

 in:   r0 = 4 (reason code)

 out:  r0 = LSW of Ethernet Network Address (or 0)
       r1 = MSW of Ethernet Network Address (or 0)

-------------------------------------------------------------------------

 in:   r0 = 5 (reason code)
 
 out:  r0 = LSW of Raw data from Dallas Chip
       r1 = MSW of Raw data from Dallas Chip

-------------------------------------------------------------------------

 in:   r0 =  6 (reason code)
       r1 -> input block, 1 word per entry, giving number of value
             required, terminated by -1
 OR:   r1 =  0 if just 1 value is required, and this is to beturned in r2
       r2 -> output block, 1 word per entry, will be filled in on output
 OR:   r2 =  number of single value required, if r1 = 0

On exit:
  if r1 entry != 0:
        r0,r1,r2 preserved
        output block filled in, filled in value(s) set to 0 if
        unrecognised/no longer meaningful value(s)
  if r1 entry = 0:
        r0,r1 preserved
        r2 = single value required, or set to 0 if if unrecognised/
        no longer meaningful value

 valid value numbers available - see table below
        CamEntriesPointer       = 0
        MaxCamEntry             = 1
        PageFlags_Unavailable   = 2
        PhysRamTable            = 3
        ARMA_Cleaner_flipflop   = 4
        TickNodeChain           = 5
        ROMModuleChain          = 6
        DAList                  = 7
        AppSpaceDANode          = 8
        Module_List             = 9
        ModuleSHT_Entries       = 10
        ModuleSWI_HashTab       = 11
        IOSystemType            = 12
        L1PT                    = 13
        L2PT                    = 14
        UNDSTK                  = 15
        SVCSTK                  = 16
        SysHeapStart            = 17

-------------------------------------------------------------------------

 in:    r0 =  6 (reason code)
        read 32-bit Abort information for last unexpected abort
        (prefetch or data)
 out:   r1 = 32-bit PC for last abort
        r2 = 32-bit PSR for last abort
        r3 = fault address for last abort (same as PC for prefetch abort)

-------------------------------------------------------------------------

 in:    r0 = 8 (reason code 8)
 out:   r0 = platform class
             currently defined classes are:
                0 = unspecified platform (r1,r2 will be 0)
                1 = Medusa   (currently returned for Risc PC only)
                2 = Morris   (currently returned for A7000 only)
                3 = Morris+  (currently returned for A7000+ only)
                4 = Phoebe   (currently returned for Risc PC 2 only)
                all other values currently reserved
        r1 = 32 additional platform specifier flags (if defined)
             bits 0..31 = value of flags 0..31 if defined, 0 if undefined
        r2 = defined status of the 32 flags in r1
             bits 0..31 = status of flags 0..31
                          0 = flag is undefined in this OS version
                          1 = flag is defined in this OS version

The current flag definitions for r1 (1=supported, 0=unsupported) are :

    0     = Podule expansion card(s)
    1     = PCI expansion card(s)
    2     = additional processor(s)
    3     = auto power off
    4..31 reserved (currently undefined)

-------------------------------------------------------------------------

 in:   r0 = 9 (reason code 9)
       r1 = item number to return
 out:  r0 = pointer to requested string (NULL terminated) or NULL
            if it wasn't found

 Currently defined item numbers are:

    0   = OS name
    1   = Part number
    2   = Build date
    3   = Dealer name
    4   = User name
    5   = User address