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VersionASM
View file @ 20b8fefe
......@@ -11,13 +11,13 @@
GBLS Module_HelpVersion
GBLS Module_ComponentName
GBLS Module_ComponentPath
Module_MajorVersion SETS "0.41"
Module_Version SETA 41
Module_MajorVersion SETS "0.44"
Module_Version SETA 44
Module_MinorVersion SETS ""
Module_Date SETS "19 Jan 2010"
Module_ApplicationDate SETS "19-Jan-10"
Module_Date SETS "26 Nov 2011"
Module_ApplicationDate SETS "26-Nov-11"
Module_ComponentName SETS "Serial"
Module_ComponentPath SETS "castle/RiscOS/Sources/HWSupport/Serial"
Module_FullVersion SETS "0.41"
Module_HelpVersion SETS "0.41 (19 Jan 2010)"
Module_FullVersion SETS "0.44"
Module_HelpVersion SETS "0.44 (26 Nov 2011)"
END
VersionNum
View file @ 20b8fefe
/* (0.41)
/* (0.44)
*
* This file is automatically maintained by srccommit, do not edit manually.
* Last processed by srccommit version: 1.1.
*
*/
#define Module_MajorVersion_CMHG 0.41
#define Module_MajorVersion_CMHG 0.44
#define Module_MinorVersion_CMHG
#define Module_Date_CMHG 19 Jan 2010
#define Module_Date_CMHG 26 Nov 2011
#define Module_MajorVersion "0.41"
#define Module_Version 41
#define Module_MajorVersion "0.44"
#define Module_Version 44
#define Module_MinorVersion ""
#define Module_Date "19 Jan 2010"
#define Module_Date "26 Nov 2011"
#define Module_ApplicationDate "19-Jan-10"
#define Module_ApplicationDate "26-Nov-11"
#define Module_ComponentName "Serial"
#define Module_ComponentPath "castle/RiscOS/Sources/HWSupport/Serial"
#define Module_FullVersion "0.41"
#define Module_HelpVersion "0.41 (19 Jan 2010)"
#define Module_LibraryVersionInfo "0:41"
#define Module_FullVersion "0.44"
#define Module_HelpVersion "0.44 (26 Nov 2011)"
#define Module_LibraryVersionInfo "0:44"
s/Init
View file @ 20b8fefe
......@@ -50,6 +50,8 @@ PutCharOutputFileHandle # 4 ; = file handle for putchar stream (0 i
HWAddress # 4 ; = address of controller
WaitForIRQsToFire # 4 ; -> routine to allow pending IRQs to fire
; now some power control variables (only valid on machines with 82C710/711)
portable_present # 4 ; = 0 if we don't think the Portable module is present
......@@ -88,7 +90,11 @@ SerCompat_Mask * 2_10000000
SerialPowerBits * PortableControl_SerialEnable
[ :LNOT: HAL
IOC_UARTAddress * C710 + &3F8*4 ; where the serial port lives in IOC world
|
IOC_UARTOffset * &3F8*4 ; offset from C710 for HAL version
]
PCI_UARTAddress * &3F8 ; where the serial port lives in PCI version (yuck)
PCI_DeviceNo * 25 ; and its interrupt (aargh)
......@@ -128,7 +134,6 @@ printertype = "Set PrinterType$2 devices#buffer3:$."
devicename = "Serial", 0
[ international
! 0, "Internationalised"
resource_file = "Resources:$.Resources.Serial.Messages", 0
]
ALIGN
......@@ -212,6 +217,11 @@ init Entry
STR r0, InputBufferHandle
STR r0, OutputBufferHandle
MOV r0, #0 ; Read feature flags and address of IRQ delay routine too
MOV r1, #0 ; In case of unknown SWI error
SWI XOS_PlatformFeatures
STR r1, WaitForIRQsToFire
MOV r0, #2 ; =2, read machine hardware type
SWI XOS_ReadSysInfo
EXIT VS ; return if it went wrong!!!
......@@ -263,8 +273,18 @@ init Entry
ORREQ r0, r0, #f_UseFIFOs ; set flag
STREQ r0, Flags
LDR r0, =IOC_UARTAddress ; note the base address
STR r0, HWAddress
[ HAL
MOV r0, #9
MOV r1, #34<<8
SWI XOS_Memory
BVS init_BadHardware
CMP r1, #0
BEQ init_BadHardware
ADD r0, r1, #IOC_UARTOffset
|
LDR r0, =IOC_UARTAddress
]
STR r0, HWAddress ; note the base address
MOV r0, #hw_IOEB ; h/w recognized (covers IOMD too)
ADDR r1, Serial710 ; Handler address
......@@ -467,10 +487,9 @@ serviceentry LDR wp, [wp]
MOV r0, #0 ; our file handle is not in use any more
STR r0, PutCharOutputFileHandle ; so zero it
STR r0, [sp, #1*4] ; indicate we've closed it on exit too
SWI XOS_Find ; close file, ignore errors
MOV r1, #0 ; indicate we've closed it
Pull "r0,lr,pc" ; restore r0, junk r1 and exit
Pull "r0-r1,pc"
20
[ standalonemessages
......
s/Serial
View file @ 20b8fefe
......@@ -129,7 +129,6 @@
GET Hdr:FSNumbers
GET Hdr:HighFSI
GET Hdr:NewErrors
; GET Hdr:NewSpace
GET Hdr:DevNos
GET Hdr:Services
GET Hdr:Symbols
......@@ -141,7 +140,6 @@
GET Hdr:Serial
GET Hdr:RS423
GET Hdr:Buffer
; GET Hdr:IOEB
$GetIO
GET Hdr:IO.IOEB
GET Hdr:MsgTrans
......@@ -191,7 +189,7 @@ hostvdu SETL false
international SETL true
OldHardware SETL false ;true
NewHardware SETL true
PCIHardware SETL true
PCIHardware SETL M_Tungsten ; TODO - Should be specified in components file?
NewSplitScheme SETL false ; (mainly because vt220 can't cope with an error from SerialOp(3))
NewBaudRates SETL NewHardware
KickSerialTX SETL true
......@@ -221,10 +219,6 @@ close SETD false ; debugging stream closing
GET Init.s
GET Common.s
GBLL StrongARM
StrongARM SETL {TRUE}
GBLS getaroundaasm
[ OldHardware
getaroundaasm SETS "GET s.Serial6551"
......
s/Serial710
View file @ 20b8fefe
......@@ -106,7 +106,9 @@ FW_BreakEnable * 1 :SHL: 6 ; set to enable break signal
FW_AddressDivisor * 1 :SHL: 7 ; set to access baud rate divisors
; ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
[ :LNOT: HAL
Combo * &03010000
]
SMIindex * &3A8
SMIaccess * &3AC
SMIENBL1 * &0C
......@@ -138,7 +140,7 @@ serial1_bit * 8
; call with r1..r7 containing parameters.
;
; With bit 31 set then r2 is a pointer to a command block containing the
; relevant parameters. This is mainly to save lots of fafing around in
; relevant parameters. This is mainly to save lots of faffing around in
; the support module and moving registers about.
;
......@@ -404,9 +406,14 @@ reset710 Entry "r0-r3, r11"
ORR r3, r3, #f_SerialIRQ ; and we now have the IRQ vector
STR r3, Flags
10
[ PCIHardware
[ PCIHardware :LOR: HAL
Push "r8,r9"
[ PCIHardware
MOV r0, #PCI_DeviceNo
|
MOV r0, #IOEB_Serial_DevNo
]
MOV r8, #0
MOV r9, #EntryNo_HAL_IRQEnable
SWI XOS_Hardware
Pull "r8,r9"
......@@ -1099,7 +1106,7 @@ break710 EntryS "r0, r11"
;
;
nobreak710 Entry "r0,r7,r11"
nobreak710 Entry "r0,r6-r7,r11"
BL SetPower_On
......@@ -1117,6 +1124,7 @@ nobreak710 Entry "r0,r7,r11"
]
LDR r11, HWAddress
LDR r6, WaitForIRQsToFire
LDR r0, SerialDeviceFlags
ORR r0, r0, #1:SHL:SF_StoppingBreak ; indicate that we wish to stop break
......@@ -1136,20 +1144,15 @@ nobreak710 Entry "r0,r7,r11"
15
TST r0, #LS_TXShiftEmpty
BNE %FT20 ; transmitter has finished shifting, so can clear break bit
[ No32bitCode
TEQP lr, pc ; restore IRQ state for a bit
|
MSR CPSR_c, r7 ; restore IRQ state for a bit
]
[ StrongARM
;StrongARM core will not see interrupt unless disable is cleared for at least 5 cycles,
;in order to fill synchroniser pipe
NOP
NOP
NOP
NOP
NOP
]
TEQ r6, #0
MOVNE lr, pc
MOVNE pc, r6 ; if needed do enough of a delay interrupts to occur
[ No32bitCode
TEQP lr, pc ; then disable them again
|
......