Commit 6fdd2c5c authored by Robert Sprowson's avatar Robert Sprowson Committed by ROOL
Browse files

Fix accidental zero page access & arg vetting

Service.s: Only claim OS_Byte 128 for subreasons 0-4 (for the joystick), leave 5+ alone.
Ticky.s: Fix control register read to be IOMD relative, not 0 relative, resulting in accidental zero page accesses.

Version 0.29. Tagged as 'Joystick-0_29'
parent 4348c0ca
;
; This file is automatically maintained by srccommit, do not edit manually.
; Last processed by srccommit version: 1.1.
;
GBLS Module_MajorVersion
GBLA Module_Version
......@@ -10,14 +9,12 @@
GBLS Module_ApplicationDate
GBLS Module_HelpVersion
GBLS Module_ComponentName
GBLS Module_ComponentPath
Module_MajorVersion SETS "0.28"
Module_Version SETA 28
Module_MajorVersion SETS "0.29"
Module_Version SETA 29
Module_MinorVersion SETS ""
Module_Date SETS "27 Jan 2013"
Module_ApplicationDate SETS "27-Jan-13"
Module_Date SETS "07 Dec 2019"
Module_ApplicationDate SETS "07-Dec-19"
Module_ComponentName SETS "Joystick"
Module_ComponentPath SETS "castle/RiscOS/Sources/HWSupport/Joystick"
Module_FullVersion SETS "0.28"
Module_HelpVersion SETS "0.28 (27 Jan 2013)"
Module_FullVersion SETS "0.29"
Module_HelpVersion SETS "0.29 (07 Dec 2019)"
END
/* (0.28)
/* (0.29)
*
* This file is automatically maintained by srccommit, do not edit manually.
* Last processed by srccommit version: 1.1.
*
*/
#define Module_MajorVersion_CMHG 0.28
#define Module_MajorVersion_CMHG 0.29
#define Module_MinorVersion_CMHG
#define Module_Date_CMHG 27 Jan 2013
#define Module_Date_CMHG 07 Dec 2019
#define Module_MajorVersion "0.28"
#define Module_Version 28
#define Module_MajorVersion "0.29"
#define Module_Version 29
#define Module_MinorVersion ""
#define Module_Date "27 Jan 2013"
#define Module_Date "07 Dec 2019"
#define Module_ApplicationDate "27-Jan-13"
#define Module_ApplicationDate "07-Dec-19"
#define Module_ComponentName "Joystick"
#define Module_ComponentPath "castle/RiscOS/Sources/HWSupport/Joystick"
#define Module_FullVersion "0.28"
#define Module_HelpVersion "0.28 (27 Jan 2013)"
#define Module_LibraryVersionInfo "0:28"
#define Module_FullVersion "0.29"
#define Module_HelpVersion "0.29 (07 Dec 2019)"
#define Module_LibraryVersionInfo "0:29"
......@@ -81,6 +81,8 @@ OSByte17
; ---------------------------------------------------------------------------
OSByte128
CMP r3, #5
BCS %BT05 ; Not for us
CMP r3, #0
BNE %FT15
; Do the fire bit reading here
......
......@@ -15,7 +15,7 @@
; > Sources.Ticky
TickerRoutine ;Periodically executes, updating the magic locations.
TEQ r0, #4
TEQ r0, #Event_VSync
BEQ handleit
TEQ pc, pc
MOVNES pc, lr ; pass it on (26-bit)
......@@ -26,39 +26,37 @@ handleit
LDR r12, [r12] ;Get workspace address into R12
;Let's see if we have any channels to start counting again...
LDR r2, =AnalogueControlReg
LDRB r1, [r2] ;Read the Control reg just in case
LDR r4, iomd_address
LDRB r1, [r4, #AnalogueControlReg] ;Read the Control reg just in case
LDRB r0, misc_flags ;Read the misc flags...
TST r0, #RstChan1Flag
ORRNE r1, r1, #AnalogueChn1Cnt ;Counters on, and...
BICNE r1, r1, #AnalogueChn1Dchg ;Start the capacitor charging
STRNEB r1, [r2] ;Write back to the control reg
STRNEB r1, [r4, #AnalogueControlReg] ;Write back to the control reg
BICNE r0, r0, #RstChan1Flag ;Clear the misc reset flag
TST r0, #RstChan2Flag
ORRNE r1, r1, #AnalogueChn2Cnt ;Counters on, and...
BICNE r1, r1, #AnalogueChn2Dchg ;Start the capacitor charging
STRNEB r1, [r2] ;Write back to the control reg
STRNEB r1, [r4, #AnalogueControlReg] ;Write back to the control reg
BICNE r0, r0, #RstChan2Flag ;Clear the misc reset flag
TST r0, #RstChan3Flag
ORRNE r1, r1, #AnalogueChn3Cnt ;Counters on, and...
BICNE r1, r1, #AnalogueChn3Dchg ;Start the capacitor charging
STRNEB r1, [r2] ;Write back to the control reg
STRNEB r1, [r4, #AnalogueControlReg] ;Write back to the control reg
BICNE r0, r0, #RstChan3Flag ;Clear the misc reset flag
TST r0, #RstChan4Flag
ORRNE r1, r1, #AnalogueChn4Cnt ;Counters on, and...
BICNE r1, r1, #AnalogueChn4Dchg ;Start the capacitor charging
STRNEB r1, [r2] ;Write back to the control reg
STRNEB r1, [r4, #AnalogueControlReg] ;Write back to the control reg
BICNE r0, r0, #RstChan4Flag ;Clear the misc reset flag
;Now let's see which channels are complete!
LDR r4, iomd_address
LDRB r4, [r4, #AnalogueStatusReg]
TST r4, #Any_Completed
BEQ EndTickerRoutine
......
Markdown is supported
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment