Commits (4)
  • Jeffrey Lee's avatar
    Fix 32bit conversion issue · 6c68eb4b
    Jeffrey Lee authored
    Detail:
      s/Taskman - Generation of TaskWindow_Dying error within ByteV handler wasn't balancing the stack correctly, causing it to try branching to the PSR. Fix this, and tighten up the code a bit (can use R0 as temp as it'll always be set to something sensible on exit)
    Admin:
      Tested on iMx6
      Fixes reported issue with machine stiffing when killing task windows containing running programs
      Issue was only observed on pre-PMP kernel version, where the code would have branched into the free pool (loaded PSR appeared to be &80000193), corrupted some memory, and then got stuck in a loop
      Presumably this has never been spotted on other systems because there would have rarely been any memory at that location, generating an immediate abort, but the error message gets swallowed because the task is exiting? (or there was memory there, but the user got lucky and the code aborts before fatally corrupting anything)
    
    
    Version 0.77. Tagged as 'TaskWindow-0_77'
    6c68eb4b
  • Jeffrey Lee's avatar
    Remove ARM2-era NOPs. Avoid updated PSR macros generating redundant NOPs where possible. · 5e279358
    Jeffrey Lee authored
    Detail:
      s/Taskman - Remove all NOPs from after PSR manipulation macros; the macros now take care of these for us. Change some RestPSR instances to the "f" variant, so that the macro won't insert ARM2 NOPs.
    Admin:
      Tested PlingSystem build on (ARM3) RISC OS 3.1
      Requires HdrSrc-2_63 to be ARM2 safe
    
    
    Version 0.78. Tagged as 'TaskWindow-0_78'
    5e279358
  • Jeffrey Lee's avatar
    Clear the exclusive monitor when returning to a pre-empted task · 3ef9cca5
    Jeffrey Lee authored
    Detail:
      s/Taskman - As described in the ARM ARM, the local exclusive monitor is allowed to be a bit dumb when it comes to comparing addresses, and so a manual CLREX is required whenever we return to code that has been unwillingly pre-empted
    Admin:
      Tested on Raspberry Pi
    
    
    Version 0.79. Tagged as 'TaskWindow-0_79'
    3ef9cca5
  • Jeffrey Lee's avatar
    Fix off-by-one error in INKEY timer · 42a78113
    Jeffrey Lee authored
    Detail:
      s/Taskman - When TaskWindow was converted to use TickerV instead of VSync events for implementing the INKEY timer, one line of code was left in the wrong place, causing all INKEY delays to be 1cs longer than they should
    Admin:
      Tested on PandaBoard
      100 * OS_Byte 129,0,0 now completes instantly (was 1s), 100 * OS_Byte 129,1,0 now completes in 1s (was 2s), both now matching single-tasking behaviour
      Should fix issue reported on forums with OS_Byte 129,0,0 -heavy programs running unreasonably slow:
      https://www.riscosopen.org/forum/forums/4/topics/9317
    
    
    Version 0.80. Tagged as 'TaskWindow-0_80'
    42a78113
......@@ -11,13 +11,13 @@
GBLS Module_HelpVersion
GBLS Module_ComponentName
GBLS Module_ComponentPath
Module_MajorVersion SETS "0.76"
Module_Version SETA 76
Module_MajorVersion SETS "0.80"
Module_Version SETA 80
Module_MinorVersion SETS ""
Module_Date SETS "11 Jan 2014"
Module_ApplicationDate SETS "11-Jan-14"
Module_Date SETS "02 Jun 2017"
Module_ApplicationDate SETS "02-Jun-17"
Module_ComponentName SETS "TaskWindow"
Module_ComponentPath SETS "castle/RiscOS/Sources/Desktop/TaskWindow"
Module_FullVersion SETS "0.76"
Module_HelpVersion SETS "0.76 (11 Jan 2014)"
Module_FullVersion SETS "0.80"
Module_HelpVersion SETS "0.80 (02 Jun 2017)"
END
/* (0.76)
/* (0.80)
*
* This file is automatically maintained by srccommit, do not edit manually.
* Last processed by srccommit version: 1.1.
*
*/
#define Module_MajorVersion_CMHG 0.76
#define Module_MajorVersion_CMHG 0.80
#define Module_MinorVersion_CMHG
#define Module_Date_CMHG 11 Jan 2014
#define Module_Date_CMHG 02 Jun 2017
#define Module_MajorVersion "0.76"
#define Module_Version 76
#define Module_MajorVersion "0.80"
#define Module_Version 80
#define Module_MinorVersion ""
#define Module_Date "11 Jan 2014"
#define Module_Date "02 Jun 2017"
#define Module_ApplicationDate "11-Jan-14"
#define Module_ApplicationDate "02-Jun-17"
#define Module_ComponentName "TaskWindow"
#define Module_ComponentPath "castle/RiscOS/Sources/Desktop/TaskWindow"
#define Module_FullVersion "0.76"
#define Module_HelpVersion "0.76 (11 Jan 2014)"
#define Module_LibraryVersionInfo "0:76"
#define Module_FullVersion "0.80"
#define Module_HelpVersion "0.80 (02 Jun 2017)"
#define Module_LibraryVersionInfo "0:80"
......@@ -34,6 +34,7 @@
GET Hdr:FPEmulator
GET Hdr:PublicWS
GET Hdr:OSRSI6
GET Hdr:OSMisc
GET VersionASM
GBLL CheckBufferPointers
......@@ -81,6 +82,29 @@ CheckBufferPointers SETL {FALSE}
]
MEND
MACRO
MyCLREX $temp1, $temp2
; Returning to code that was pre-empted, so CLREX required
[ NoARMv6
[ SupportARMv6
; Need to support both old and new architectures
LDR $temp1, GlobalWS
LDR $temp2, [$temp1, #:INDEX:PlatFeatures]
TST $temp2, #CPUFlag_LoadStoreEx
SUB $temp1, r13, #4
STREXNE $temp2, $temp1, [$temp1]
]
ELIF NoARMK
; ARMv6, need dummy STREX
; Use the word below SP
SUB $temp1, r13, #4
STREX $temp2, $temp1, [$temp1]
|
; ARMv6K+, have CLREX
CLREX
]
MEND
GBLL StrongARM
GBLL SASTMhatbroken
StrongARM SETL {TRUE}
......@@ -518,6 +542,13 @@ Code_InitEntry ROUT
LDREQ r2, =&01F033FC
STR r2, SvcTable
[ NoARMv6 :LAND: SupportARMv6
MOV r0, #OSPlatformFeatures_ReadCodeFeatures
SWI XOS_PlatformFeatures
MOVVS r0, #0
STR r0, PlatFeatures
]
[ DoingSwi
BL Claim_SWIs
]
......@@ -1281,7 +1312,6 @@ Code_StartEntry ROUT
BL SaveEscape ; Do this while in SVC mode
; since it calls a user handler
WritePSRc USR_mode,r14 ; must be user mode here
NOP
;
; Now in user mode, so r13 and r14 are new
;
......@@ -1366,7 +1396,7 @@ Code_StartEntry ROUT
BL WriteSpoolHandle
Pull "r0,r1,lr"
RestPSR lr
RestPSR lr,,f
Pull "$Regs" ; restore user regs
......@@ -2555,7 +2585,6 @@ MyEventV ROUT
]
Push "r1 - r5"
SETPSR SVC_mode,R5,,R4 ; Enter SVC mode
NOP
MOV r5, r14 ; Remember r14_svc
MOV r0, #CallBackHandler
ADRL r1, Code_CallBackHandler
......@@ -2630,7 +2659,6 @@ R1R = "R1 in ROM > &3800000", 0
SWI OS_SetCallBack ; And request the call back
MOV r14, r5 ; Restore svc_r14
RestPSR r4 ; Previous mode
NOP
Pull "r1 - r5" ; Register preservation
MOV r0, #0
STR r0, PassOnVectors ; Back on vectors again
......@@ -2722,7 +2750,6 @@ MyWrchV ROUT
]
LDR r13, SVCStackBase ; New empty SVC stack
WritePSRc USR_mode,r2,,r1 ; must be user mode here, save flags in R1
NOP
;
; Now in user mode, so r13 and r14 are new
;
......@@ -2819,7 +2846,6 @@ notcontrol
SWI OS_EnterOS ; back to SVC mode
RestPSR r1 ; restore the mode
NOP ; nop for 3 mu ARM
BL RestoreSVCStack ; Put back real SVC stack
......@@ -2976,7 +3002,6 @@ MyUpCallV ROUT
]
LDR r13, SVCStackBase ; New empty SVC stack
WritePSRc USR_mode,r2,,r1 ; must be user mode here, save flags in R1
NOP
;
; Now in user mode, so r13 and r14 are new
;
......@@ -3048,7 +3073,6 @@ MyUpCallV ROUT
SWI OS_EnterOS ; back to SVC mode
RestPSR r1 ; restore the mode
NOP ; nop for 3 mu ARM
BL RestoreSVCStack ; Put back real SVC stack
......@@ -3081,7 +3105,7 @@ MyUpCallV ROUT
ADRNE r0, ErrorBlock_TaskWindow_Dying
BNE CopyError
BIC r14, r14, #V_bit ; clear V (CopyError will set it again if needs be)
RestPSR r14 ; Restore flags
RestPSR r14,,f ; Restore flags
Pull r14 ; Get return address anyway
ADRNE r0, ErrorBlock_Escape
BNE CopyError
......@@ -3127,11 +3151,11 @@ MyRdchV ROUT
BL FindOwner
TEQ r12, #0 ; See if someone got vectors
BNE %FT05
RestPSR r1
RestPSR r1,,f
Pull "r0, r1, pc" ; Just pass on if not
05
RestPSR r1
RestPSR r1,,f
Pull "r0, r1, r14"
CheckIn
......@@ -3170,7 +3194,6 @@ MyRdchV ROUT
;
LDR r13, SVCStackBase ; New empty SVC stack
WritePSRc USR_mode,r2,,r1 ; must be user mode here, save flags in R1
NOP
;
; Now in user mode, so r13 and r14 are new
;
......@@ -3231,7 +3254,6 @@ MyRdchV ROUT
SWI OS_EnterOS ; back to SVC mode
RestPSR r1 ; restore the mode
NOP ; nop for 3 mu ARM
BL RestoreSVCStack ; Put back real SVC stack
[ DebugExit
......@@ -3325,9 +3347,9 @@ MyByteV ROUT
AND r0, r1, #&FF
AND r2, r2, #&FF
ORR r0, r0, r2, LSL #8; Get count value
ADD r0, r0, #1 ; Ensure count 1 not treated as zero
[ UseTickerV
|
ADD r0, r0, #1 ; Ensure count 1 not treated as zero
MOV r0, r0, LSR #1 ; Divide by two for use with VSync
]
STR r0, InkeyCount
......@@ -3375,7 +3397,6 @@ MyByteV ROUT
;
LDR r13, SVCStackBase ; New empty SVC stack
WritePSRc USR_mode,r2,,r1 ; USR mode, IRQs enabled, old PSR in r1
NOP
;
; Now in user mode, so r13 and r14 are new
;
......@@ -3448,7 +3469,6 @@ MyByteV ROUT
SWI OS_EnterOS ; back to SVC mode
RestPSR r1 ; restore the mode
NOP ; nop for 3 mu ARM
BL RestoreSVCStack ; Put back real SVC stack
[ DebugExit
......@@ -3478,14 +3498,10 @@ MyByteV ROUT
MOVS r2, #0 ; Set zero
35
SavePSR r14
Push r14
LDR r14, Moribund
TEQ r14, #0 ; Are we dying
Pull r14
Pull r14, NE ; Get return address if going to cause error
ADRNE r0, ErrorBlock_TaskWindow_Dying
BNE CopyError
RestPSR r14 ; Restore flags
LDR r0, Moribund
TEQ r0, #0 ; Are we dying
BNE %FT42 ; Go generate error
RestPSR r14,,f ; Restore flags
MOVNE r2, #Esc
40
......@@ -3497,6 +3513,11 @@ MyByteV ROUT
MOV r0, #Inkey
Pull "pc" ; return to caller
42
Pull "r0, r14" ; Discard CPSR, get return address
ADR r0, ErrorBlock_TaskWindow_Dying
B CopyError
; .......................................................................
; EscapeAck - first see if escape exists
......@@ -3724,7 +3745,6 @@ Code_CallBackHandler ROUT
; enter USR mode
;
WritePSRc USR_mode,r2,,r1 ; user mode, irqs enabled, old CPSR saved for later
NOP
;
; Now in user mode, so r13 and r14 are new
;
......@@ -3786,7 +3806,6 @@ Code_CallBackHandler ROUT
SWI OS_EnterOS ; back to SVC mode
RestPSR r1 ; restore the mode
NOP ; nop for 3 mu ARM
BL RestoreSVCStack ; Put back real SVC stack
CheckOut
......@@ -3805,7 +3824,6 @@ Code_CallBackHandler ROUT
; check for the task's escape handler having requested a callback
;
WritePSRc USR_mode,r0,,r1 ; USR mode, IRQs enabled, old state in R1
NOP
ADR r13, MyVecStack+MyStackSize ; and we've got a stack!
[ checkingcallback
LDRB r14, callbackflag
......@@ -3814,7 +3832,6 @@ Code_CallBackHandler ROUT
]
SWI OS_EnterOS
RestPSR r1
; NOP ; not required as it happens
|
[ DebugExit
MOV r14, #"c"
......@@ -3860,6 +3877,7 @@ Code_CallBackHandler ROUT
CheckOut
]
MyCLREX r0, r1
ADR r14, CallBackRegs
LDMIA r14, {r0-r14}^ ; get USR registers
NOP
......@@ -3888,6 +3906,7 @@ Code_CallBackHandler ROUT
40
CheckOut
50
MyCLREX r0, r1
ADR r14, CallBackRegs
TEQ PC,PC
LDREQ r0, [r14, #16*4] ; The CPSR
......@@ -4427,7 +4446,7 @@ grotpollwimp
LDRB r1, CopyOfRedirectOutHandle
SWI XOS_ChangeRedirection
Pull "r0,r1,lr"
RestPSR lr
RestPSR lr,,f
]
[ DebugWimp
......@@ -5287,6 +5306,9 @@ MyWriteEnv Word 2 ; space for RAM code
MyWriteEnv_CodeAddr Word ; must follow MyWriteEnv
MOS_WriteEnv Word ; previous OS_WriteEnv handler
SvcTable Word ; address of Kernel SWI despatch table
[ NoARMv6 :LAND: SupportARMv6
PlatFeatures Word ; OS_PlatformFeatures 0 flags
]
GlobalWorkSpaceSize * :INDEX:@
......