Commit e06a1f48 authored by Jeffrey Lee's avatar Jeffrey Lee

Fix code to be fully aware of 64bit parameter flags, fix accidental alignment...

Fix code to be fully aware of 64bit parameter flags, fix accidental alignment exceptions on ARMv6/v7

Detail:
  s/Debugger - All code which calls ReadOneParm, ReadParm, etc. now correctly sets r10 to the correct value depending on whether they want to parse 64bit numbers or not. This was the cause of *InitStore malfunctioning and (presumably) trashing whatever R11 pointed to (bug #232)
  Also fixed MemoryHeader causing an unintentional alignment exception when testing if rotated or unaligned loads are in use. The CP15 registers are now interrogated instead.
Admin:
  Tested on rev C2 beagleoard. *Memory with unaligned addresses no longer aborts, and *InitStore <val> now uses the correct value, and seems to no longer trash memory
  Fixes bug #232


Version 1.80. Tagged as 'Debugger-1_80'
parent d316b11b
......@@ -11,13 +11,13 @@
GBLS Module_HelpVersion
GBLS Module_ComponentName
GBLS Module_ComponentPath
Module_MajorVersion SETS "1.79"
Module_Version SETA 179
Module_MajorVersion SETS "1.80"
Module_Version SETA 180
Module_MinorVersion SETS ""
Module_Date SETS "26 Jun 2009"
Module_ApplicationDate SETS "26-Jun-09"
Module_Date SETS "30 Jan 2010"
Module_ApplicationDate SETS "30-Jan-10"
Module_ComponentName SETS "Debugger"
Module_ComponentPath SETS "castle/RiscOS/Sources/Programmer/Debugger"
Module_FullVersion SETS "1.79"
Module_HelpVersion SETS "1.79 (26 Jun 2009)"
Module_FullVersion SETS "1.80"
Module_HelpVersion SETS "1.80 (30 Jan 2010)"
END
/* (1.79)
/* (1.80)
*
* This file is automatically maintained by srccommit, do not edit manually.
* Last processed by srccommit version: 1.1.
*
*/
#define Module_MajorVersion_CMHG 1.79
#define Module_MajorVersion_CMHG 1.80
#define Module_MinorVersion_CMHG
#define Module_Date_CMHG 26 Jun 2009
#define Module_Date_CMHG 30 Jan 2010
#define Module_MajorVersion "1.79"
#define Module_Version 179
#define Module_MajorVersion "1.80"
#define Module_Version 180
#define Module_MinorVersion ""
#define Module_Date "26 Jun 2009"
#define Module_Date "30 Jan 2010"
#define Module_ApplicationDate "26-Jun-09"
#define Module_ApplicationDate "30-Jan-10"
#define Module_ComponentName "Debugger"
#define Module_ComponentPath "castle/RiscOS/Sources/Programmer/Debugger"
#define Module_FullVersion "1.79"
#define Module_HelpVersion "1.79 (26 Jun 2009)"
#define Module_LibraryVersionInfo "1:79"
#define Module_FullVersion "1.80"
#define Module_HelpVersion "1.80 (30 Jan 2010)"
#define Module_LibraryVersionInfo "1:80"
......@@ -3262,6 +3262,7 @@ InitStore_Code Entry "r6-r11"
MOV r1, r0
ADR r0, InitStore_Error
MOV r10, #0 ; arguments can only be 32-bit
BL ReadOneParm ; r7 := parm, r8 state
BLVS CopyError
EXIT VS
......@@ -3908,8 +3909,19 @@ MemoryHeader Entry
ALIGN
EXIT VS
LDR r0, %FT50+1 ; try an unaligned load
TEQ r0, #0
; Use the system control register to check whether we're using rotated or unaligned loads. Safer than attempting an actual unaligned load, because alignment faults may be turned on!
; Unfortunately, in ARMv5 and below, any unused bits of the system control register have undefined values.
; So we must first check if we're on ARMv6/v7 (where the 'U' bit was first introduced), and then check if the bit is set :(
MRC p15,0,r0,c0,c0,0
ANDS lr, r0, #&0000F000 ; EQ = ARM 3/6
TEQNE lr, #&00007000 ; EQ = ARM 7
BEQ %FT40 ; Old CPU, so must be rotated load
AND lr, r0, #&000F0000 ; Get architecture number
TEQ lr, #&00070000 ; ARMv6?
TEQNE lr, #&000F0000 ; ARMv7+?
BNE %FT40 ; Old CPU, so must be rotated load
MRC p15, 0, r0, c1, c0, 0
TST r0, #1:SHL:22 ; 'U' bit
BEQ %FT40 ; pre-ARMv6 style rotated load
; else ARMv7-style unaligned load
CMP r6, #4
......@@ -3929,8 +3941,6 @@ MemoryHeader Entry
ADRLO r0, Bytes
ADR lr, %FT70
MOV pc, r0
50
DCD 0, -1
70
BL SpaceColonSpace
EXIT VS
......@@ -4557,6 +4567,7 @@ BreakSet_Code Entry "r6-r11"
LDR wp, [r12]
MOV r1, r0
MOV r10, #0 ; arguments can only be 32-bit
BL ReadFirstParm ; r7 := parm
EXIT VS
......@@ -4724,6 +4735,7 @@ BreakClr_Code Entry "r6-r11"
MOV r1, r0
ADR r0, BreakClr_Error
MOV r10, #0 ; arguments can only be 32-bit
BL ReadOneParm ; r7 := parm, r8 state
BLVS CopyError
EXIT VS
......@@ -5469,6 +5481,8 @@ GetCommandParms Entry "r2"
; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
; In r1 -> string
; r10 = flags: Command_64bitData => arg2 (if present) must be returned in buffer
; r11 = buffer to hold 64-bit arg2 data if found
; Out r7 = value of parm
; r8 = parm state
......@@ -5589,6 +5603,8 @@ ReadParm Entry "r2"
; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
; In r1 -> string
; r0 -> error to generate if parmfollowed
; r10 = flags: Command_64bitData => arg2 (if present) must be returned in buffer
; r11 = buffer to hold 64-bit arg2 data if found
; Out r7, r8 from ReadFirstParm
......
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