Commit 80d99af3 authored by Kevin Bracey's avatar Kevin Bracey
Browse files

* Fixed register clash warnings on SWP.

* Changes to message files to correct syntax errors.
* *MemoryX P works on IOMD-based systems is OS_Memory 13 fails.
* Changed to use ObjAsm and centralised Makefiles.

Version 1.73. Tagged as 'Debugger-1_73'
parent 66132615
......@@ -19,85 +19,15 @@
# ***********************************
# Date Name Description
# ---- ---- -----------
# 08-Jun-94 AMcC Created.
# 10-May-01 KJB Nicked
#
#
# Paths
#
EXP_HDR = <export$dir>
#
# Generic options:
#
MKDIR = cdir
AS = aasm
CP = copy
RM = remove
WIPE = -wipe
CCFLAGS = -c -depend !Depend -IC:
ASFLAGS = -depend !Depend -Stamp -quit -module -To $@ -From
CPFLAGS = ~cfr~v
WFLAGS = ~cr~v
TOKENISE = tokenise
TOKENS = Hdr:Tokens
#
# Program specific options:
#
COMPONENT = Debugger
SOURCE = s.Debugger
TARGET = rm.${MACHINE}.Debugger
EXPORTS = ${EXP_HDR}.Debugger
#
# Generic rules:
#
rom: $(TARGET) local_dirs
@echo ${COMPONENT}: rom module built
export: ${EXPORTS}
@echo ${COMPONENT}: export complete
install_rom: $(TARGET)
$(CP) $(TARGET) $(INSTDIR).$(COMPONENT) $(CPFLAGS)
@echo ${COMPONENT}: rom module installed
clean:
${WIPE} rm ${WFLAGS}
$(RM) $(TARGET)
$(RM) TokHelpSrc
@echo ${COMPONENT}: cleaned
resources: resources-${CMDHELP}
@echo ${COMPONENT}: resource files copied
resources_common:
${MKDIR} ${RESDIR}.${COMPONENT}
TokenCheck LocalRes:Messages
${CP} LocalRes:Messages ${RESDIR}.${COMPONENT}.Messages ${CPFLAGS}
resources-None: resources_common
@
resources-: resources_common
TokenCheck LocalRes:CmdHelp
print LocalRes:CmdHelp { >> ${RESDIR}.${COMPONENT}.Messages }
local_dirs:
${MKDIR} rm
${MKDIR} rm.${MACHINE}
$(TARGET): $(SOURCE) TokHelpSrc
${MKDIR} rm.${MACHINE}
$(AS) $(ASFLAGS) $(SOURCE)
${EXP_HDR}.Debugger: hdr.Debugger
${CP} hdr.Debugger $@ ${CPFLAGS}
TokHelpSrc: $(TOKENS) HelpSrc
$(TOKENISE) $(TOKENS) HelpSrc $@
COMPONENT = Debugger
HELPSRC = HelpSrc
TOKENSOURCE = TokHelpSrc
TOKHELPSRC = ${TOKENSOURCE}
include StdTools
include AAsmModule
# Dynamic dependencies:
......@@ -14,4 +14,5 @@
|
Dir <Obey$Dir>
amu_machine clean
remove rm.DbgMess
stripdepnd
No preview for this file type
......@@ -11,14 +11,14 @@
GBLS Module_HelpVersion
GBLS Module_ComponentName
GBLS Module_ComponentPath
Module_MajorVersion SETS "1.72"
Module_Version SETA 172
Module_MajorVersion SETS "1.73"
Module_Version SETA 173
Module_MinorVersion SETS ""
Module_Date SETS "01 May 2001"
Module_ApplicationDate2 SETS "01-May-01"
Module_ApplicationDate4 SETS "01-May-2001"
Module_Date SETS "10 May 2001"
Module_ApplicationDate2 SETS "10-May-01"
Module_ApplicationDate4 SETS "10-May-2001"
Module_ComponentName SETS "Debugger"
Module_ComponentPath SETS "RiscOS/Sources/Programmer/Debugger"
Module_FullVersion SETS "1.72"
Module_HelpVersion SETS "1.72 (01 May 2001)"
Module_FullVersion SETS "1.73"
Module_HelpVersion SETS "1.73 (10 May 2001)"
END
/* (1.72)
/* (1.73)
*
* This file is automatically maintained by srccommit, do not edit manually.
*
*/
#define Module_MajorVersion_CMHG 1.72
#define Module_MajorVersion_CMHG 1.73
#define Module_MinorVersion_CMHG
#define Module_Date_CMHG 01 May 2001
#define Module_Date_CMHG 10 May 2001
#define Module_MajorVersion "1.72"
#define Module_Version 172
#define Module_MajorVersion "1.73"
#define Module_Version 173
#define Module_MinorVersion ""
#define Module_Date "01 May 2001"
#define Module_Date "10 May 2001"
#define Module_ApplicationDate2 "01-May-01"
#define Module_ApplicationDate4 "01-May-2001"
#define Module_ApplicationDate2 "10-May-01"
#define Module_ApplicationDate4 "10-May-2001"
#define Module_ComponentName "Debugger"
#define Module_ComponentPath "RiscOS/Sources/Programmer/Debugger"
#define Module_FullVersion "1.72"
#define Module_HelpVersion "1.72 (01 May 2001)"
#define Module_FullVersion "1.73"
#define Module_HelpVersion "1.73 (10 May 2001)"
......@@ -211,9 +211,17 @@
; ARM documentation.
; 1.71 KJB 18-Apr-01 Fixed and tidied *ShowFPRegs - in particular will work
; correctly with 26-bit FPEmulators.
; 1.72 SAR 28-Apr-01 Introduced the Disassemble$Options code variable to control
; various alternatives for disassembly. In particular, the
; register name output can now be in APCS mode(s).
; 1.72 SAR 28-Apr-01 Introduced the Disassemble$Options code variable to
; control various alternatives for disassembly. In
; particular, the register name output can now be in
; APCS mode(s).
; MJS 05-May-01 Added P flag to *MemoryX commands to access physical
; addresses.
; 1.73 KJB 10-May-01 Fixed warnings on SWP.
; Changes to message files to correct syntax errors.
; *MemoryX P works on IOMD-based systems if OS_Memory 13
; fails.
; Changed to use ObjAsm.
;
; ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
......@@ -477,7 +485,7 @@ ampersand * "&"
ARM_Addr_Mask * &FC000000 ; local mask to avoid knocking off byte offsets
LEADR Module_LoadAddr
AREA |Debugger$$Code|, CODE, READONLY, PIC
Module_BaseAddr
......@@ -526,7 +534,7 @@ Debug_Flags
; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
; In r0-r6 trashable
Debug_Init ENTRY
Debug_Init Entry
LDR r2, [r12] ; Hard or soft init ?
TEQ r2, #0
......@@ -594,7 +602,7 @@ Debug_Init ENTRY
[ PhysAddr
STR R3, PhysAddrWrd
]
mrs ,R3, CPSR
MRS R3, CPSR
ANDS R3, R3, #2_11100 ; non-zero if in a 32-bit mode
STRB R3, SysIs32bit
......@@ -643,7 +651,7 @@ Debug_Service ROUT
MOVNE pc, lr
Debug_ServiceBody
ENTRY "r0, r1"
Entry "r0, r1"
LDR wp, [r12]
MOV r0, #ExceptionDumpArea ; Set exception dump area
ADR r1, Registers
......@@ -654,7 +662,7 @@ Debug_ServiceBody
; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
; In r0-r6 trashable
Debug_Die ENTRY
Debug_Die Entry
LDR wp, [r12]
......@@ -747,7 +755,7 @@ Debug_HC_Table ; Name Max Min
; Out r1 -> core containing string
; r2 = length of string excluding 0 terminator
Debug_SWI_Code ENTRY "r9"
Debug_SWI_Code Entry "r9"
LDR wp, [r12]
TEQ R11,#0 ;only one SWI
......@@ -813,7 +821,7 @@ checkreg
; r2 = length of string including 0
; r10,r11 corrupt
Instruction ENTRY "r0, r3-r9"
Instruction Entry "r0, r3-r9"
SUB R4, R9, #4
LDR R5, OldAddress
......@@ -1625,12 +1633,19 @@ swp
AddStr aswp,,conds
TestBit 22,"B"
MOV r9,r4,LSR #16
AND r9,r9,#2_1111 ; Rn
MOV R5,R4,LSR #12
AND r9,r5,#2_1111 ; Rd
AND r5,r5,#2_1111 ; Rd
; Rd=R15 -> unpredictable
TEQS r9,#15
TEQS r5,#15
MOVEQ r14,#Mistake_R15
STREQ r14,Mistake
; Rd=Rn -> unpredictable
TEQS r5,r9
MOVEQ r14,#Mistake_RdRn
STREQ r14,Mistake
BL Tab_Dis_Register
AND R5,R4,#2_1111 ; Rm
......@@ -1638,23 +1653,18 @@ swp
TEQS r5,#15
MOVEQ r14,#Mistake_R15
STREQ r14,Mistake
; Rd=Rm -> unpredictable
; Rm=Rn -> unpredictable
TEQS r5,r9
MOVEQ r14,#Mistake_RdRm
MOVEQ r14,#Mistake_RmRn
STREQ r14,Mistake
BL Comma_Dis_Register
AddStr Open_B
MOV R5,R4,LSR #16
AND r5,r5,#2_1111 ; Rn
MOV r5,r9 ; Rn
; Rn=R15 -> unpredictable
TEQS r5,#15
MOVEQ r14,#Mistake_R15
STREQ r14,Mistake
; Rd=Rn -> unpredictable
TEQS r5,r9
MOVEQ r14,#Mistake_RdRn
STREQ r14,Mistake
BL Dis_Register
AddChar "]"
[ {FALSE}
......@@ -2686,7 +2696,7 @@ Co_Transfers
; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Tab_CPN ENTRY
Tab_CPN Entry
BL Tab
......@@ -2730,7 +2740,7 @@ ShiftField ROUT
ANDS r2, r2, #&FF ; LSL #0 -> no shift at all
MOVEQ pc, lr
ENTRY
Entry
TEQ r2, #2_00000110 ; ROR #0 -> RRX
BEQ %FT80
......@@ -2885,7 +2895,7 @@ SaveString EntryS
; Out r0++ with condition codes appended
Conditions ENTRY "r1, r10"
Conditions Entry "r1, r10"
10 MOV r1, r4, LSR #28
CMPS r1, #14
......@@ -2946,7 +2956,7 @@ SaveStringConditions2 ALTENTRY
; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
; Pad with spaces to operand field or comment field
Tab ENTRY
Tab Entry
10 ADR r1, StringBuffer
SUB r1, r0, r1
......@@ -2977,7 +2987,7 @@ Rem DCB " ; ", 0
ALIGN
TestMistakes
ENTRY "r5"
Entry "r5"
LDR R5,Mistake
CMPS R5,#1
BLT exitM
......@@ -3026,7 +3036,7 @@ Silly
; Out r0 ++
StoreHex ENTRY "r2"
StoreHex Entry "r2"
AddChar "&"
......@@ -3067,7 +3077,7 @@ StoreDecimal EntryS "r1-r2, r4"
; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
StoreDecimal_Comma ENTRY
StoreDecimal_Comma Entry
BL StoreDecimal
B %FT50
......@@ -3098,7 +3108,7 @@ MemoryI_Error
ALIGN
MemoryI_Code ENTRY "r6-r11"
MemoryI_Code Entry "r6-r11"
[ Thumb
MOV R6,#"T"
......@@ -3244,7 +3254,7 @@ InitStore_Error
UserMemStart * &8000
InitStore_Code ENTRY "r6-r11"
InitStore_Code Entry "r6-r11"
LDR wp, [r12]
......@@ -3282,7 +3292,7 @@ ShowRegs_Code
; .............................................................................
ShowRegs_Code_Common ENTRY "r6-r11"
ShowRegs_Code_Common Entry "r6-r11"
BL message_writes ; Display address of register dump
DCB "M17", 0 ; "Register dump (stored at &)
......@@ -3487,7 +3497,7 @@ ARM32_Modes
; Out char printed uppercase or lowercase, r0 corrupt
DoFlagBit ENTRY
DoFlagBit Entry
TST r1, r10
ORREQ r0, r0, #&20 ; Cheap lowercase, known values input
......@@ -3502,7 +3512,7 @@ Memory_Error
ALIGN
Memory_Code ENTRY "r6-r11"
Memory_Code Entry "r6-r11"
[ Thumb
MOV R6,#"B"
......@@ -3647,6 +3657,9 @@ Memory_Code ENTRY "r6-r11"
B %BT90
[ PhysAddr
; in all these cases, if the OS_Memory call fails, we assume
; the system is an IOMD-based non-HAL system, where the 512MB
; of physical address space is mapped in at &80000000.
; in: r0 = address, out: r1 = (word) data
do_readW ROUT
......@@ -3658,11 +3671,13 @@ do_readW ROUT
MOV r1, r0
MOV r0, #14
SWI XOS_Memory ;access physical address
BICVS r2, r1, #&E0000000
ORRVS r2, r2, #&80000000
LDR r2, [r2] ;read from logical mapping
MOV r0, #15
MOV r1, r3
SWI XOS_Memory ;release physical address
MOV r1, r2
MOVVC r0, #15
MOVVC r1, r3
SWIVC XOS_Memory ;release physical address
ADDS r1, r2, #0 ;clear V
Pull "r0,r2-r3, pc"
; in: r0 = address, out: r1 = (byte) data
......@@ -3675,11 +3690,13 @@ do_readB ROUT
MOV r1, r0
MOV r0, #14
SWI XOS_Memory ;access physical address
BICVS r2, r1, #&E0000000
ORRVS r2, r2, #&80000000
LDRB r2, [r2] ;read from logical mapping
MOV r0, #15
MOV r1, r3
SWI XOS_Memory ;release physical address
MOV r1, r2
MOVVC r0, #15
MOVVC r1, r3
SWIVC XOS_Memory ;release physical address
ADDS r1, r2, #0 ;clear V
Pull "r0,r2-r3, pc"
; in: r0 = address, r1 = (word) data
......@@ -3692,11 +3709,14 @@ do_writeW ROUT
MOV r1, r0
MOV r0, #14
SWI XOS_Memory ;access physical address
BICVS r2, r1, #&E0000000
ORRVS r2, r2, #&80000000
LDR r1, [sp, #4]
STR r1, [r2] ;write to logical mapping
MOV r0, #15
MOV r1, r3
SWI XOS_Memory ;release physical address
MOVVC r0, #15
MOVVC r1, r3
SWIVC XOS_Memory ;release physical address
ADDS r0, r0, #0 ;clear V
Pull "r0-r3, pc"
; in: r0 = address, r1 = (byte) data
......@@ -3709,18 +3729,21 @@ do_writeB ROUT
MOV r1, r0
MOV r0, #14
SWI XOS_Memory ;access physical address
BICVS r2, r1, #&E0000000
ORRVS r2, r2, #&80000000
LDR r1, [sp, #4]
STRB r1, [r2] ;write to logical mapping
MOV r0, #15
MOV r1, r3
SWI XOS_Memory ;release physical address
MOVVC r0, #15
MOVVC r1, r3
SWIVC XOS_Memory ;release physical address
ADDS r0, r0, #0 ;clear V
Pull "r0-r3, pc"
] ;PhysAddr
; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
SpaceColonSpace ENTRY
SpaceColonSpace Entry
SWI XOS_WriteI+space
SWIVC XOS_WriteI+colon
......@@ -3729,7 +3752,7 @@ SpaceColonSpace ENTRY
; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
MemoryHeader ENTRY
MemoryHeader Entry
SWI XOS_NewLine
EXIT VS
......@@ -3770,7 +3793,7 @@ MemoryHeader ENTRY
; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
; Print header in right order dependent on r9 (0,4,8,C)
Words ENTRY "r9, r10, r11"
Words Entry "r9, r10, r11"
LDR r11, BytesPerLine
......@@ -3800,7 +3823,7 @@ Words_Header
; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
; Count from r9 to r9+15 modulo 16 along the top
Bytes ENTRY "r9, r10, r11"
Bytes Entry "r9, r10, r11"
LDR r11, BytesPerLine
......@@ -3821,7 +3844,7 @@ Bytes ENTRY "r9, r10, r11"
; In r2 = number of blanks to go (multiple of 4)
Blank ENTRY
Blank Entry
10 SWI XOS_WriteI+space
EXIT VS
......@@ -3843,7 +3866,7 @@ Blank ENTRY
]
; r0 corrupt
MemoryCommon ENTRY
MemoryCommon Entry
LDR wp, [r12]
......@@ -3903,7 +3926,7 @@ MemoryPhys ROUT
; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
MemoryA_Code ENTRY "r6-r11"
MemoryA_Code Entry "r6-r11"
[ Thumb
MOV R6,#"B"
......@@ -4175,7 +4198,7 @@ Interactive ROUT
; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
BreakSet_Code ENTRY "r6-r11"
BreakSet_Code Entry "r6-r11"
LDR wp, [r12]
......@@ -4264,7 +4287,7 @@ BreakSet_Error
; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
BreakList_Code ENTRY "r6-r11"
BreakList_Code Entry "r6-r11"
LDR wp, [r12]
......@@ -4341,7 +4364,7 @@ BreakClr_Error
ALIGN
BreakClr_Code ENTRY "r6-r11"
BreakClr_Code Entry "r6-r11"
LDR wp, [r12]
......@@ -4413,7 +4436,7 @@ BreakClr_Code ENTRY "r6-r11"
; r3 = breakpoint number*8
; r4 -> Breaklist
ClearBreakpoint ENTRY "r0-r2, r10"
ClearBreakpoint Entry "r0-r2, r10"
MOV r14, #-1 ; Always clear breakpoint entry
STR r14, [r4, r3] ; Only need to zap address field
......@@ -4452,7 +4475,7 @@ ClearBreakpoint ENTRY "r0-r2, r10"
; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Continue_Code ENTRY "r6-r11"
Continue_Code Entry "r6-r11"
LDR wp, [r12]
......@@ -4610,17 +4633,17 @@ Continue32
TST r14_svc, #2_11100
ORREQ r1, r14_svc, #&10+F32_bit+I32_bit ; convert 26-bit modes to 32-bit form
ORRNE r1, r14_svc, #F32_bit+I32_bit ; otherwise, just ints off
msr ,CPSR_c, r1 ; Enter correct mode, ints off
msr ,SPSR_cxsf, r14_svc ; Set up SPSR ready for return
MSR CPSR_c, r1 ; Enter correct mode, ints off
MSR SPSR_cxsf, r14_svc ; Set up SPSR ready for return
LDMIA r0, {r0-pc}^ ; Restore int state, r0 never banked
97
mrs ,r14_svc, CPSR
MRS r14_svc, CPSR
ORR r14_svc, r14_svc, #I32_bit
msr ,CPSR_c, r14_svc ; IRQs off for SPSR use
MSR CPSR_c, r14_svc ; IRQs off for SPSR use
LDR r14_svc, [r0, #16*4]
msr ,SPSR_cxsf, r14_svc ; Set up SPSR ready for return
MSR SPSR_cxsf, r14_svc ; Set up SPSR ready for return
MOV r14_svc, r0
LDMIA r14_svc, {r0-r12, r13_usr, r14_usr}^
......@@ -4653,7 +4676,7 @@ Debug_Code
; .............................................................................
Debug_Code_Common ENTRY "r6-r11"
Debug_Code_Common Entry "r6-r11"
10
BL message_writes
......@@ -4684,7 +4707,7 @@ Debug_Code_Common ENTRY "r6-r11"
; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
AckEscape ENTRY "r1, r2"
AckEscape Entry "r1, r2"
MOV r0, #&7E
SWI XOS_Byte
......@@ -4697,7 +4720,7 @@ AckEscape ENTRY "r1, r2"
; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
PrintError ENTRY
PrintError Entry
ADD r0, r0, #4
SWI XOS_Write0
......@@ -4710,7 +4733,7 @@ PrintError ENTRY
; Out r0 corrupt if error
DisplayHex ENTRY "r0, r2"
DisplayHex Entry "r0, r2"
10 MOV r0, r10, LSR r2
AND r0, r0, #15
......@@ -4734,7 +4757,7 @@ DisplayHexWord_R9
; .............................................................................
DisplayHexWord ENTRY "r2"
DisplayHexWord Entry "r2"
MOV r2, #32-4
BL DisplayHex
......@@ -4743,7 +4766,7 @@ DisplayHexWord ENTRY "r2"
; .............................................................................
[ Thumb
DisplayHexHalfword ENTRY "r2"
DisplayHexHalfword Entry "r2"
MOV r2, #16-4
BL DisplayHex
......@@ -4757,7 +4780,7 @@ DisplayHexHalfword ENTRY "r2"
; Out VS: r0 -> error
; VC: all preserved
DisplayCharacters ENTRY "r0, r2, r9"
DisplayCharacters Entry "r0, r2, r9"
10
[ PhysAddr
......@@ -4784,7 +4807,7 @@ DisplayCharacters ENTRY "r0, r2, r9"
; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
; In r8 = number to display
DisplayDecimalNumber ENTRY "r0-r2"
DisplayDecimalNumber Entry "r0-r2"