Commit 302102ca authored by Ben Avison's avatar Ben Avison

A new feature and a bugfix.

Detail:
  * Added 'H' flag to *Memory and *MemoryA to allow half-word memory accesses.
    On 26-bit machines, this is emulated using 32-bit reads and read-modify-
    writes; on 32-bit machines, LDRH and STRH are used. Address header in
    *Memory byte mode changed to be only one digit per byte for consistency
    with word and half-word modes. *MemoryA H in interactive mode gives a
    Thumb disassembly.
  * STM Rn!,{reg_list_including_Rn} is actually allowed, provided Rn is the
    lowest register in the list. Warning code adjusted accordingly.
Admin:
  Tested on Risc PC and Tungsten.

Version 1.76. Tagged as 'Debugger-1_76'
parent 0af8a6fe
......@@ -26,7 +26,7 @@ COMPONENT = Debugger
HELPSRC = HelpSrc
TOKENSOURCE = TokHelpSrc
TOKHELPSRC = ${TOKENSOURCE}
ASFLAGS = -cpu 4
HEADER1 = Debugger
include StdTools
......
No preview for this file type
......@@ -61,6 +61,7 @@ M46:Invalid value
M48:No room in breakpoint table
M50:Bad breakpoint
M65:Unpredictable instruction
M75:Half-word at &
F00:infinity
F01:quiet NaN
......
......@@ -11,13 +11,13 @@
GBLS Module_HelpVersion
GBLS Module_ComponentName
GBLS Module_ComponentPath
Module_MajorVersion SETS "1.75"
Module_Version SETA 175
Module_MajorVersion SETS "1.76"
Module_Version SETA 176
Module_MinorVersion SETS ""
Module_Date SETS "03 Dec 2002"
Module_ApplicationDate SETS "03-Dec-02"
Module_ComponentName SETS "Debugger"
Module_ComponentPath SETS "RiscOS/Sources/Programmer/Debugger"
Module_FullVersion SETS "1.75"
Module_HelpVersion SETS "1.75 (03 Dec 2002)"
Module_FullVersion SETS "1.76"
Module_HelpVersion SETS "1.76 (03 Dec 2002)"
END
/* (1.75)
/* (1.76)
*
* This file is automatically maintained by srccommit, do not edit manually.
* Last processed by srccommit version: 1.68.
*
*/
#define Module_MajorVersion_CMHG 1.75
#define Module_MajorVersion_CMHG 1.76
#define Module_MinorVersion_CMHG
#define Module_Date_CMHG 03 Dec 2002
#define Module_MajorVersion "1.75"
#define Module_Version 175
#define Module_MajorVersion "1.76"
#define Module_Version 176
#define Module_MinorVersion ""
#define Module_Date "03 Dec 2002"
......@@ -18,6 +18,6 @@
#define Module_ComponentName "Debugger"
#define Module_ComponentPath "RiscOS/Sources/Programmer/Debugger"
#define Module_FullVersion "1.75"
#define Module_HelpVersion "1.75 (03 Dec 2002)"
#define Module_LibraryVersionInfo "1:75"
#define Module_FullVersion "1.76"
#define Module_HelpVersion "1.76 (03 Dec 2002)"
#define Module_LibraryVersionInfo "1:76"
......@@ -275,6 +275,9 @@ PhysAddr SETL {TRUE} :LAND: Thumb
GBLL CirrusDSP
CirrusDSP SETL False
GBLL HalfWord ; 'H' switch to *Memory[A]
HalfWord SETL True
; Continue not up to much
......@@ -1125,7 +1128,12 @@ notbad
MOV r10, r4, LSR #16
AND r10, r10, #2_1111
MOV r14, #1
TSTS r4, r14, LSL r10
MOV r14, r14, LSL r10
TSTS r4, r14
BEQ notbad3
TestBit 20 ; If it's an STM
SUBEQ r14, r14, #1
TSTEQS r4, r14 ; and Rn is lowest in list, then it's okay
MOVNE r10,#Mistake_Rninlist
STRNE r10,Mistake
BNE notbad2
......@@ -3535,9 +3543,16 @@ Memory_Code Entry "r6-r11"
TST r8, #secondparm
ADDEQ r7, r9, #256 ; [no second parameter]
[ HalfWord
SUB r6, r6, #1
BIC r9, r9, r6 ; Round down by appropriate amount
BIC r7, r7, r6
ADD r6, r6, #1
|
TEQS r6, #4 ; Round down if words
BICEQ r9, r9, #3
BICEQ r7, r7, #3
]
TEQS r7, r9 ; If same, ensure we do one byte/word
ADDEQ r7, r7, r6
......@@ -3575,15 +3590,27 @@ Memory_Code Entry "r6-r11"
BVS %FT90
LDR r8, BytesPerLine
[ HalfWord
CMP r6, #2
MOVHI r8, r8, LSR #2 ; words per line
MOVEQ r8, r8, LSR #1 ; half-words per line
|
TEQS r6, #4
MOVEQ r8, r8, LSR #2 ; words per line
]
MOV r0, r9
10
[ HalfWord
CMP r6, #2
BHI %FT20
BEQ %FT15
|
TEQS r6, #4 ; Need to size reset each loop
MOVEQ r2, #32-4 ; word
BEQ %FT20
]
MOV r2, #8-4 ; byte
......@@ -3605,8 +3632,36 @@ Memory_Code Entry "r6-r11"
B %FA30
]
[ HalfWord
15 MOV r2, #16-4
SWI XOS_WriteI+space
SWI XOS_WriteI+space
20 SWI XOS_WriteS ; Display word
TEQ r0, r7
BEQ %FT50 ; [ended, so blank. DO NOT READ BYTE]
BVS %FA30
[ PhysAddr
Push "r1"
BL do_readH
MOV r10, r1
ADD r0, r0, #2
Pull "r1"
B %FA30
|
TEQ pc, pc
LDRNE r10, [r0], #2
LDREQH r10, [r0], #2 ; <<<get from buffer
B %FA30
]
]
20
[ HalfWord
MOV r2, #32-4
]
SWI XOS_WriteS ; Display word
DCB " ", 0
ALIGN
......@@ -3688,6 +3743,33 @@ do_readW ROUT
ADDS r1, r2, #0 ;clear V
Pull "r0,r2-r3, pc"
[ HalfWord
; in: r0 = address, out: r1 = (half-word) data
do_readH ROUT
Push "r0,r2-r3, r14"
LDR r14, PhysAddrWrd
TEQ r14, #0
BNE %FT50
TEQ pc, pc
LDRNE r1, [r0]
LDREQH r1, [r0]
Pull "r0,r2-r3, pc"
50
MOV r1, r0
MOV r0, #14
SWI XOS_Memory ;access physical address
BICVS r2, r1, #&E0000000
ORRVS r2, r2, #&80000000
TEQ pc, pc
LDRNE r2, [r2] ;read from logical mapping
LDREQH r2, [r2]
MOVVC r0, #15
MOVVC r1, r3
SWIVC XOS_Memory ;release physical address
ADDS r1, r2, #0 ;clear V
Pull "r0,r2-r3, pc"
]
; in: r0 = address, out: r1 = (byte) data
do_readB ROUT
Push "r0,r2-r3, r14"
......@@ -3727,6 +3809,47 @@ do_writeW ROUT
ADDS r0, r0, #0 ;clear V
Pull "r0-r3, pc"
[ HalfWord
; in: r0 = address, r1 = (half-word) data
do_writeH ROUT
Push "r0-r3, r14"
LDR r14, PhysAddrWrd
TEQ r14, #0
BNE %FT50
TEQ pc, pc
STREQH r1, [r0]
Pull "r0-r3, pc",EQ
LDR r14, [r0]
MOV r14, r14, LSR #16
ORR r14, r14, r1, LSL #16
TST r0, #2
MOVEQ r14, r14, ROR #16
STR r14, [r0]
Pull "r0-r3, pc"
50
MOV r1, r0
MOV r0, #14
SWI XOS_Memory ;access physical address
BICVS r2, r1, #&E0000000
ORRVS r2, r2, #&80000000
LDR r1, [sp, #4]
TEQ pc, pc
BNE %FT75
STRH r1, [r2] ;write to logical mapping
60 MOVVC r0, #15
MOVVC r1, r3
SWIVC XOS_Memory ;release physical address
ADDS r0, r0, #0 ;clear V
Pull "r0-r3, pc"
75 LDR r14, [r2]
MOV r14, r14, LSR #16
ORR r14, r14, r1, LSL #16
TST r2, #2
MOVEQ r14, r14, ROR #16
STR r14, [r2] ;write to logical mapping
B %BT60
]
; in: r0 = address, r1 = (byte) data
do_writeB ROUT
Push "r0-r3, r14"
......@@ -3769,9 +3892,16 @@ MemoryHeader Entry
ALIGN
EXIT VS
[ HalfWord
CMP r6, #2
ADRHI r0, Words
ADREQ r0, HalfWords
ADRLO r0, Bytes
|
TEQ r6, #4
ADREQ r0, Words
ADRNE r0, Bytes
]
MOV lr, pc
MOV pc, r0
......@@ -3828,6 +3958,42 @@ Words_Header
DCB "F E D C", 0
ALIGN
[ HalfWord
; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
; Print header in right order dependent on r9 (0,2,4,6,8,A,C,E)
HalfWords Entry "r9, r10, r11"
LDR r11, BytesPerLine
ADR r10, HalfWords_Header
10 SWI XOS_WriteS
DCB " ", 0
ALIGN
ANDVC r9, r9, #&F
ADDVC r0, r10, r9, LSL #1
SWIVC XOS_Write0
EXIT VS
ADD r9, r9, #2
SUBS r11, r11, #2
BNE %BT10
EXIT
HalfWords_Header
DCB "1 0", 0
DCB "3 2", 0
DCB "5 4", 0
DCB "7 6", 0
DCB "9 8", 0
DCB "B A", 0
DCB "D C", 0
DCB "F E", 0
ALIGN
]
; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
; Count from r9 to r9+15 modulo 16 along the top
......@@ -3836,7 +4002,8 @@ Bytes Entry "r9, r10, r11"
LDR r11, BytesPerLine
10 SWI XOS_WriteI+space
MOVVC r2, #8-4
SWI XOS_WriteI+space
MOVVC r2, #4-4
ANDVC r10, r9, #&F
BLVC DisplayHex
EXIT VS
......@@ -3867,11 +4034,16 @@ Blank Entry
; r6 = character to check for
; Out r1 -> string
[ HalfWord
; r6 = 1, 2 or 4 if r6 = 'B' on entry, else r6 = 1 or 4 depending on whether 'r6' present
; any matching flag is skipped
|
[ Thumb
; r6 = 1 or 4 depending on whether 'r6' present (+ skipped)
|
; r6 = 1 or 4 depending on whether 'B' present (+ skipped)
]
]
; r0 corrupt
MemoryCommon Entry
......@@ -3887,6 +4059,29 @@ MemoryCommon Entry
]
BL SkipSpaces ; check for 'r6',space
[ HalfWord
ASSERT Thumb
TEQ r6, #'B'
MOVEQ r14, #'H' ; alternate character
MOVNE r14, r6
TEQ r0, r6 ; Check upper case
TEQNE r0, r14
ADDNE r6, r6, #"a"-"A"
ADDNE r14, r14, #"a"-"A"
TEQNE r0, r6 ; Check lower case
TEQNE r0, r14
LDREQB r14, [r1, #1]
TEQEQ r14, #space
MOVNE r6, #4 ; Neither found
BNE %FT50
ADD r1, r1, #2 ; skip 'r6',space
TEQ r0, r6 ; First or only alternate?
MOVEQ r6, #1
MOVNE r6, #2
50
|
[ Thumb
TEQ r0, R6 ; Check upper case
ADDNE r6, r6, #"a"-"A"
......@@ -3900,6 +4095,7 @@ MemoryCommon Entry
ADDEQ r1, r1, #2 ; skip 'r6',space
MOVEQ r6, #1 ; bytes (or Thumb)
MOVNE r6, #4 ; otherwise
]
[ PhysAddr
LDR r0, PhysAddrWrd
......@@ -3948,8 +4144,14 @@ MemoryA_Code Entry "r6-r11"
TST r8, #&FF00 ; had operator ?
BNE %FT99 ; [not permitted here]
[ HalfWord
SUB r6, r6, #1
BIC r9, r9, r6 ; Round down by appropriate amount
ADD r6, r6, #1
|
TEQS r6, #4 ; round down if words
BICEQ r9, r9, #3
]
BL SwapAllBreakpoints
......@@ -3958,9 +4160,18 @@ MemoryA_Code Entry "r6-r11"
; Simple command, not interactive
[ HalfWord
ASSERT PhysAddr
CMP r6, #2
BLO mai_byte
BEQ mai_halfword
|
TEQ r6, #4
[ PhysAddr
BNE mai_byte
]
]
[ PhysAddr
MOV r2, #32-4
Push "r1"
MOV r0, r9
......@@ -3981,6 +4192,22 @@ MemoryA_Code Entry "r6-r11"
ADREQ r0, %FT40
]
[ PhysAddr :LAND: HalfWord
mai_halfword
MOV r2, #16-4
Push "r1"
MOV r0, r9
BL do_readH
MOV r4, r1
MOV r1, r7
BL do_writeH
BL do_readH
MOV r5, r1
ADR r0, %FT42
Pull "r1"
B mai_cont
]
[ PhysAddr
mai_byte
MOV r2, #8-4
......@@ -4027,6 +4254,10 @@ mai_cont
DCB "M24", 0 ; "Word at &"
41
DCB "M25", 0 ; "Byte at &"
[ HalfWord
42
DCB "M75", 0 ; "Half-word at &"
]
44
DCB "M26", 0 ; " was &"
45
......@@ -4061,13 +4292,25 @@ Interactive ROUT
BLVC MarkPC
ASSERT PhysAddr :LOR: :LNOT: HalfWord
[ HalfWord
BVS %FT90
]
[ PhysAddr
Push "r0, r1"
MOV r0, r9
[ HalfWord
ADD lr, pc, #12 ; they don't return using MOVS
CMP r6, #2
BHI do_readW
BEQ do_readH
BLO do_readB
|
TEQ r6, #4
BLEQ do_readW
TEQ r6, #4
BLNE do_readB
]
MOV r10, r1
Pull "r0, r1"
|
......@@ -4080,17 +4323,45 @@ Interactive ROUT
BLVC MarkBreakpoints
[ HalfWord
BVS %FT90
CMP r6, #2
MOVHI r2, #32-4
MOVEQ r2, #16-4
MOVLO r2, #8-4
|
TEQ r6, #4
MOVEQ r2, #32-4
MOVNE r2, #8-4
]
BLVC DisplayHex
SWIVC XOS_WriteI+space
SWIVC XOS_WriteI+colon
SWIVC XOS_WriteI+space
[ HalfWord
BVS %FT90
CMP r6, #2
BLO %FT50 ; Only don't disassemble when doing bytes
BHI %FT40
ASSERT PhysAddr
Push "r1"
MOV r0, r9
BL do_readH
MOV r0, r1
Pull "r1"
MOVVC r1, r9
SWIVC XDebugger_DisassembleThumb
MOVVC r0, r1
SWIVC XOS_Write0
B %FT50
40
|
TEQ r6, #4 ; Only disassemble when doing words
BNE %FT50
]
[ PhysAddr
BVS %FT48
......@@ -4145,9 +4416,18 @@ Interactive ROUT
Pull r8
BVS %FT90
[ HalfWord
ASSERT PhysAddr
CMP r6, #2
BLO %FT60
BEQ %FT55
|
[ PhysAddr
TEQ r6, #4
BNE %FT60
]
]
[ PhysAddr
Push "r0, r1"
MOV r0, r9
MOV r1, r7
......@@ -4164,6 +4444,19 @@ Interactive ROUT
MOVEQ r2, #32-4
]
[ HalfWord :LAND: PhysAddr
55
Push "r0, r1"
MOV r0, r9
MOV r1, r7
BL do_writeH
BL do_readH
MOV r10, r1
Pull "r0, r1"
MOV r2, #16-4
B %FT70
]
[ PhysAddr
60
Push "r0, r1"
......
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