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Ben Avison authored
Detail: * Added knowledge of the ARMv5TEJ / ARMv6 CPSR flags J, GE[3:0], E and A, plus Monitor mode * *Memory, *Memory H, *MemoryA and *MemoryA H can now access unaligned addresses; the header line in unaligned cases adapts depending on whether the CPU natively rotates or does unaligned loads * Added *Memory D and *MemoryA D for accessing 64-bit words using LDRD / STRD * Removed check for 32-bit mode before doing LDRH - this is nonsensial now that there are 32-bit builds for IOMD-class machines. I've decided to let it attempt LDRH even on platforms where it might not work or might be an undefined instruction - this gets us "closer to the metal", and it's not like *Memory couldn't already throw exceptions in normal use * Removed redundant clauses of a few build options, it was getting impractical to maintain the alternate build variants Admin: Tested on rev B7 beagleboard. Requires an updated kernel in order to be able to specify 64-bit values on the command line or interactively (but even on older kernels you can enter a value less than 2^32 to *MemoryA D) Version 1.78. Tagged as 'Debugger-1_78'
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