• Ben Avison's avatar
    Support large physical addresses · 239b1942
    Ben Avison authored
    When the 'P' switch is given to *Memory, *MemoryI or *MemoryA, all address
    and offset arguments are parsed as 64-bit numbers, and all physical addresses
    are displayed as 40-bit numbers. (The truncation from 64 bits is to avoid the
    standard width of *Memory output overflowing an 80-character-wide window, and
    should be fine in practice because even LPAE is limited to 40-bit addresses.)
    
    There is no facility for constructing physical address from a low-high
    register pair on the command line. However, if you know the literal value of
    the upper bits of a physical address, you could construct the offset
    manually, for example:
    
      *Memory P r0+100000000 +100
    
    Internally, this means all addresses are passed around as 64-bit numbers. To
    limit the amount of register allocation changes required, the values of
    pointers are now mostly stored on the stack. Physical address lookups are
    done usng OS_Memory 22 on kernels which provide it, falling back to
    OS_Memory 14 and then the logical mapping of physical space on early non-HAL
    kernels. Because OS_Memory 22 can return errors, there are now many more
    code paths that have to handle them.
    
    Other bugs fixed in passing:
    * Correct syntax error is printed for malformed *MemoryA commands
    * PC and breakpoint markers are not displayed in physical address mode
    * Errors reported from OS_WriteC within DisplayCharacters were being corrupted
    
    Requires header export from RiscOS/Sources/Kernel!3 in order to build
    (softload versions should still run elsewhere though).
    239b1942