From 99b3f14a4a0d9eeaf08064ec7a21424965162daa Mon Sep 17 00:00:00 2001 From: Jeffrey Lee <jlee@gitlab.riscosopen.org> Date: Mon, 13 Apr 2015 20:40:33 +0000 Subject: [PATCH] Fix aborts on Cortex-A15 when using lazy task swapping Detail: s/VMSAv6 - After AMB_LazyFixUp has modified the page tables, perform a DSB + ISB to ensure the page table write has completed before we return from the abort handler. Admin: Tested on IGEPv5 Fixes aborts seen in desktop, e.g. when !CloseUp is rebuilding its sprite (heavy RAM write activity delaying pagetable write?) Version 5.35, 4.79.2.262. Tagged as 'Kernel-5_35-4_79_2_262' --- VersionASM | 10 +++++----- VersionNum | 14 +++++++------- s/VMSAv6 | 8 ++++++++ 3 files changed, 20 insertions(+), 12 deletions(-) diff --git a/VersionASM b/VersionASM index a5e8320..a5379da 100644 --- a/VersionASM +++ b/VersionASM @@ -13,11 +13,11 @@ GBLS Module_ComponentPath Module_MajorVersion SETS "5.35" Module_Version SETA 535 -Module_MinorVersion SETS "4.79.2.261" -Module_Date SETS "29 Mar 2015" -Module_ApplicationDate SETS "29-Mar-15" +Module_MinorVersion SETS "4.79.2.262" +Module_Date SETS "13 Apr 2015" +Module_ApplicationDate SETS "13-Apr-15" Module_ComponentName SETS "Kernel" Module_ComponentPath SETS "castle/RiscOS/Sources/Kernel" -Module_FullVersion SETS "5.35 (4.79.2.261)" -Module_HelpVersion SETS "5.35 (29 Mar 2015) 4.79.2.261" +Module_FullVersion SETS "5.35 (4.79.2.262)" +Module_HelpVersion SETS "5.35 (13 Apr 2015) 4.79.2.262" END diff --git a/VersionNum b/VersionNum index b145fe2..9551572 100644 --- a/VersionNum +++ b/VersionNum @@ -5,19 +5,19 @@ * */ #define Module_MajorVersion_CMHG 5.35 -#define Module_MinorVersion_CMHG 4.79.2.261 -#define Module_Date_CMHG 29 Mar 2015 +#define Module_MinorVersion_CMHG 4.79.2.262 +#define Module_Date_CMHG 13 Apr 2015 #define Module_MajorVersion "5.35" #define Module_Version 535 -#define Module_MinorVersion "4.79.2.261" -#define Module_Date "29 Mar 2015" +#define Module_MinorVersion "4.79.2.262" +#define Module_Date "13 Apr 2015" -#define Module_ApplicationDate "29-Mar-15" +#define Module_ApplicationDate "13-Apr-15" #define Module_ComponentName "Kernel" #define Module_ComponentPath "castle/RiscOS/Sources/Kernel" -#define Module_FullVersion "5.35 (4.79.2.261)" -#define Module_HelpVersion "5.35 (29 Mar 2015) 4.79.2.261" +#define Module_FullVersion "5.35 (4.79.2.262)" +#define Module_HelpVersion "5.35 (13 Apr 2015) 4.79.2.262" #define Module_LibraryVersionInfo "5:35" diff --git a/s/VMSAv6 b/s/VMSAv6 index 5a6aaa5..3d757e7 100644 --- a/s/VMSAv6 +++ b/s/VMSAv6 @@ -497,6 +497,10 @@ PAbPreVeneer ROUT SUB r0, lr_abort, #4 ; aborting address MOV r2, #1 BL AMB_LazyFixUp ; can trash r0-r7, returns NE status if claimed and fixed up + ; DSB + ISB required to ensure effect of page table write is fully + ; visible (after overwriting a faulting entry) + myDSB NE,r0 + myISB NE,r0,,y Pull "r0-r7, lr", NE ; restore regs and SUBNES pc, lr_abort, #4 ; restart aborting instruction if fixed up LDR lr, [sp, #8*4] ; (not a lazy abort) restore lr @@ -570,6 +574,10 @@ DAbPreVeneer ROUT ARM_read_FAR r0 ; aborting address MOV r2, #0 BL AMB_LazyFixUp ; can trash r0-r7, returns NE status if claimed and fixed up + ; DSB + ISB required to ensure effect of page table write is fully + ; visible (after overwriting a faulting entry) + myDSB NE,r0 + myISB NE,r0,,y LDR lr_abort, [r13_abort, #15*4] ; restore lr_abort LDMIA r13_abort, {r0-r7} ; restore regs ADDNE r13_abort, r13_abort, #17*4 ; if fixed up, restore r13_abort -- GitLab