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Commit 9fddcac8 authored by Kevin Bracey's avatar Kevin Bracey
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Version RO_3_70 taken

parent 01b119d8
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Showing with 22 additions and 25 deletions
kernel/s/k_body
View file @ 9fddcac8
...@@ -775,15 +775,16 @@ Aborted Keep ...@@ -775,15 +775,16 @@ Aborted Keep
STMFD r13!, {r14} ; remember the abort pc STMFD r13!, {r14} ; remember the abort pc
BL |_kernel_copyerror| BL |_kernel_copyerror|
ADD r14, r12, #O_registerDump ADD r14, r12, #O_registerDump
[ SAnaffsilicon
NOP [ SASTMhatbroken
STMIB r14!, {r1-r12}
STMIB r14, {r13,r14}^
NOP NOP
] SUB r14, r14, #12*4
|
STMIB r14, {r1-r14}^ STMIB r14, {r1-r14}^
[ SAnaffsilicon
NOP
NOP
] ]
LDMFD r13!, {r1, r2, r3} LDMFD r13!, {r1, r2, r3}
TST r1, #3 TST r1, #3
LDRNE r1, [r14, #lr * 4] LDRNE r1, [r14, #lr * 4]
...@@ -1367,11 +1368,16 @@ ErrorHandler Keep ...@@ -1367,11 +1368,16 @@ ErrorHandler Keep
; we switch back to SWI mode to save the registers. ; we switch back to SWI mode to save the registers.
SWI EnterSVC SWI EnterSVC
ADD r14, r0, #O_registerDump ADD r14, r0, #O_registerDump
[ SAnaffsilicon
NOP [ SASTMhatbroken
STMIA r14!, {r0-r12}
STMIA r14, {r13,r14}^
NOP NOP
] SUB r14, r14, #13*4
|
STMIA r14, {r0-r14}^ STMIA r14, {r0-r14}^
]
MOV r12, r0 MOV r12, r0
ADD r0, r0, #O_errorNumber ADD r0, r0, #O_errorNumber
LDMDA r0, {r1, r2} ; r1 is error pc, r2 error number LDMDA r0, {r1, r2} ; r1 is error pc, r2 error number
...@@ -1403,10 +1409,7 @@ EventHandler Keep ...@@ -1403,10 +1409,7 @@ EventHandler Keep
STR r0, [r12, #O_eventCode] STR r0, [r12, #O_eventCode]
ADD r11, r12, #O_eventRegisters ADD r11, r12, #O_eventRegisters
STMIA r11, {r0-r10, r13} STMIA r11, {r0-r10, r13}
[ SAnaffsilicon
NOP
NOP
]
STMDB r11, {r13}^ STMDB r11, {r13}^
MOV v6, r12 MOV v6, r12
MOV v2, r11 MOV v2, r11
...@@ -1626,9 +1629,6 @@ ReloadUserState ...@@ -1626,9 +1629,6 @@ ReloadUserState
NOOP NOOP
ADD r14, r0, #pc*4 ADD r14, r0, #pc*4
LDMDB r14, {r0-r14}^ LDMDB r14, {r0-r14}^
[ SAnaffsilicon
NOP
]
NOOP NOOP
LDMIA r14, {pc}^ LDMIA r14, {pc}^
...@@ -3033,9 +3033,6 @@ dividebyzero ...@@ -3033,9 +3033,6 @@ dividebyzero
SWI EnterSVC SWI EnterSVC
LDR r14, [ip, #pc * 4] LDR r14, [ip, #pc * 4]
LDMIB ip, {r1-r14}^ LDMIB ip, {r1-r14}^
[ SAnaffsilicon
NOP
]
NOOP NOOP
STMDB sp!, {r10, r11, r12} STMDB sp!, {r10, r11, r12}
STMDB sp!, {r14} STMDB sp!, {r14}
......
s/h_StrongA
View file @ 9fddcac8
...@@ -14,10 +14,10 @@ ...@@ -14,10 +14,10 @@
; ;
GBLL StrongARM GBLL StrongARM
StrongARM SETL {TRUE} GBLL SASTMhatbroken
GBLL SAnaffsilicon StrongARM SETL {TRUE}
SAnaffsilicon SETL {TRUE} :LAND: StrongARM SASTMhatbroken SETL {TRUE} :LAND: StrongARM
XOS_SynchroniseCodeAreas * &2006e XOS_SynchroniseCodeAreas * &2006e
XOS_CallASWIR12 * &20071 XOS_CallASWIR12 * &20071
......
s/version
View file @ 9fddcac8
...@@ -12,5 +12,5 @@ ...@@ -12,5 +12,5 @@
; See the License for the specific language governing permissions and ; See the License for the specific language governing permissions and
; limitations under the License. ; limitations under the License.
; ;
DCB "4.84 (04 Jul 1996)" DCB "4.85 (19 Dec 1996)"
END END
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