1. 02 Mar, 2020 1 commit
    • Robert Sprowson's avatar
      Add aligned RMA claim subreason · fd81a66c
      Robert Sprowson authored
      => R0=24
         R3=size in bytes
         R4=alignment in bytes (must be a power of 2)
      <= R2=base of request
         or error
      Tested with a handful of valid and invalid alignments, and with one grossly larger than the free RMA to trigger an RMA extend to occur.
      Version 6.35. Tagged as 'Kernel-6_35'
  2. 08 Dec, 2017 1 commit
    • Robert Sprowson's avatar
      Unplug/RMInsert with podule module fix · 7b7cb6d9
      Robert Sprowson authored
      During the first pass keyboard scan the ROM module nodes are built off the anchor ROMModuleChain.
      During the second pass the whole set of ROM module nodes are temporarily constructed anchored on the stack, then switched over.
      This caused a problem when a duplicate name module was encountered on a podule (eg. MbufManager in a NIC) because FindROMModule searches from the ROMModuleChain anchor, didn't find a match, so created a new node rather than linking it to the NewerVersion/OlderVersion linked list on the existing node.
      Then *Unplug and *RMInsert would say "Module is not in ROM" if the optional podule specifier was given, because the search stopped at the first node with the right name.
      Swap round the second pass so it anchors directly on ROMModuleChain, and keeps the first pass anchor on the stack (needed only occasionally to copy over details of modules already initialised).
      Tested on a Risc PC with NIC, can now selectively unplug MbufManager again.
      Version 5.93. Tagged as 'Kernel-5_93'
  3. 09 Sep, 2017 1 commit
    • ROOL's avatar
      Change module initialisation to be a two pass scheme · ac1ea0f5
      ROOL authored
        To make it easier to support arbitrary complexity keyboard controllers (eg. USB via DWCDriver on the Pi) have the kernel do the early keyboard recovery key press detection instead of the HAL.
        During the first pass those modules used for reading the keyboard are started, ignoring the CMOS frugal bits.
        The keyboard is then scanned for 3s, during which time the RAM is cleared (unless the HAL indicated it has already been done).
        During the second pass the remaining modules are started respecting the CMOS frugal bits. Any which were already started in the first pass are inserted into the new chain, so the keyboard is reset once and only once.
        Boot times, with a 300cs key scan time in NewReset.
        Risc PC with 160MB RAM (128+32+0).
        Times from turning on power to initial "beep", using a stopwatch.
                      RISC OS 3.70 RISC OS 5.22 This OS
        ARM610        12.5         10.4         10.3
        ARM710        11.8         10.2         9.7
        StrongARM 233 11.1         9.5          8.4
        In NewReset.s:
        Remove old KbdScan code (leave Reset_IRQ_Handler for IIC only)
        If HAL_KbdScanDependencies returns a null string then present KbdDone flag and skip to full init.
        A few vestiges of soft resets removed.
        Do RAM clear when waiting for INKEY (being careful not to trash the running modules...).
        Clearing just the freepool on a 2GB Titanium cleared 7EFD6 pages (99.2%).
        In ModHand.s:
        2nd pass need to sneaky renumber the nodes (so *ROMModules is in the right order, frugal bits line up) without resetting the chain
        In HAL.s:
        Change ClearPhysRAM to ClearWkspRAM, such that it only clears the kernel workspace rather than all RAM. The bulk of the RAM is cleared during the keyboard scan by new function ClearFreePoolSection.
        Add a variant of Init_MapInRAM which clears the mapped in RAM too (as these very early claims will not be in the free pool when the RAM is cleared later).
        Remove HAL keyboard scan setup & IRQ handler.
        Fix bug in HALDebugHexTX2, the input value needs pre-shifting by 16b before continuing.
        In GetAll.s, PMF/osbyte.s:
        Use Hdr:Countries and Hdr:OsBytes for constants.
        In PMF/key.s, PMF/osinit.s:
        Relocate the key post init from PostInit to KeyPostInit.
        Changed PostInit to not tail call KeyPostInit so they can be called independently.
        In hdr/KernelWs:
        Improve comments, add InitWsStart label to refer to.
        In hdr/HALEntries:
        Add HAL_KbdScanDependencies.
        Delete KbdFlag exports.
        Took the opportunity to reorder some of the higher numbered HAL entries and re-grouping, specifically (112,120) (84,106,108,117).
        Tested on an ARM6/ARM7/SA Risc PC, BeagleBoard xM, Iyonix, Pandaboard ES, Wandboard Quad, IPEGv5, Titanium, Pi 2 and 3.
        Requires corresponding HAL change.
        Submission for USB bounty.
      Version 5.89. Tagged as 'Kernel-5_89'
  4. 25 Nov, 2016 1 commit
    • Robert Sprowson's avatar
      Issue Service_ModulePostInit when really post init · fc32d45b
      Robert Sprowson authored
      Previously, the service call was sent when the module was in the service call chain/command table hash/SWI table hash, but not actually in the list of modules - so any recipient trying to look something up with OS_Module would get denial that the module existed.
      Move the service call issue step to *after* it's linked into the module list.
      Version 5.64. Tagged as 'Kernel-5_64'
  5. 24 Jul, 2016 1 commit
    • Robert Sprowson's avatar
      Resolve 2x header clashes · 8cfe216b
      Robert Sprowson authored
        Remove this, since it clashes with the (differing API version number) copy exported by SATADriver. Post merging the Kernel back to the trunk the newer file datestamp has meant the wrong one gets exported during any ROM build which includes both components. Since the Kernel doesn't need AHCIDevice itself, it is left to the respective client (SATADriver or AHCIDriver in this case) to export them.
        Resolve the longstanding clash of Module_Title with the same named symbol that CMHG uses. There are very few assembler needing to look at the module header (Kernel, FileCore, Debugger, Podule) directly, but every C module which uses CMHG and wants one of the ModHandReason values ends up with a duplicate define.
        Obsolete Arthur era Module_LoadAddr value.
        Recode Module_LoadAddr using the file type from Hdr:FileTypes.
        Drop unused NVRAM and PortMan headers. Add Hdr:FileTypes.
      Version 5.54. Tagged as 'Kernel-5_54'
  6. 30 Jun, 2016 2 commits
    • Jeffrey Lee's avatar
      Delete lots of old switches · f655fcf6
      Jeffrey Lee authored
        This change gets rid of the following switches from the source (picking appropriate code paths for a 32bit HAL build):
        * FixCallBacks
        * UseProcessTransfer
        * CanLiveOnROMCard
        * BleedinDaveBell
        * NewStyleEcfs
        * DoVdu23_0_12
        * LCDPowerCtrl
        * HostVdu
        * Print
        * EmulatorSupport
        * TubeInfo
        * AddTubeBashers
        * TubeChar, TubeString, TubeDumpNoStack, TubeNewlNoStack macros
        * FIQDebug
        * VCOstartfix
        * AssemblingArthur (n.b. still defined for safety with anything in Hdr: which uses it, but not used explicitly by the kernel)
        * MouseBufferFix
        * LCDInvert
        * LCDSupport
        * DoInitialiseMode
        * Interruptible32bitModes
        * MouseBufferManager
        * StrongARM (new CacheCleanerHack and InterruptDelay switches added to hdr/Options to cover some functionality that StrongARM previously covered)
        * SAcleanflushbroken
        * StrongARM_POST
        * IrqsInClaimRelease
        * CheckProtectionLink
        * GSWorkspaceInKernelBuffers
        * EarlierReentrancyInDAShrink
        * LongCommandLines
        * ECC
        * NoSPSRcorruption
        * RMTidyDoesNowt
        * RogerEXEY
        * StorkPowerSave
        * DebugForcedReset
        * AssembleKEYV
        * AssemblePointerV
        * ProcessorVectors
        * Keyboard_Type
        Assorted old files have also been deleted.
        Identical binary to previous revision for IOMD & Raspberry Pi builds
      Version 5.51. Tagged as 'Kernel-5_51'
    • Jeffrey Lee's avatar
      Delete pre-HAL and 26bit code · 7d5bfc66
      Jeffrey Lee authored
        This change gets rid of the following switches from the source (picking appropriate code paths for a 32bit HAL build):
        * HAL
        * HAL26
        * HAL32
        * No26bitCode
        * No32bitCode
        * IncludeTestSrc
        * FixR9CorruptionInExtensionSWI
        Various old files have also been removed (POST code, Arc/STB keyboard drivers, etc.)
        Identical binary to previous revision for IOMD & Raspberry Pi builds
      Version 5.49. Tagged as 'Kernel-5_49'
  7. 24 Mar, 2013 1 commit
    • Robert Sprowson's avatar
      Retire single use of DebugROMErrors · 3758c6a1
      Robert Sprowson authored
      hdr/Options: Switch removed
      s/Modhand: Switch removed, now considered equivalent to DebugROMInit. DebugROMInit changed so that the callback ordering is as expected, batched up until "callbacks" is hit after Service_PostInit.
      PMF/osbyte: Redundant RISC OS 2.01 code deleted
      Version 5.35, Tagged as 'Kernel-5_35-4_79_2_184'
  8. 25 Feb, 2012 1 commit
    • Jeffrey Lee's avatar
      Add compressed ROM support. Make more use of ARMv5+ instructions. Other misc tweaks. · 538f3c24
      Jeffrey Lee authored
        hdr/OSEntries, s/HAL, s/Kernel - Add compressed ROM support.
        With the current scheme, a compressed ROM will have everything except the HAL and kernel compressed.
        During the keyboard scan period the kernel will allocate some temporary decompression workspace and call the decompression stub that was appended to the ROM.
        The decompression stub is expected to perform in-place decompression of the ROM. Once decompression is complete the workspace will be freed and the page tables updated to make the ROM image readonly.
        It's the HAL's responsibility to make sure any compressed ROM is located in an area of physically contiguous RAM large enough to hold the uncompressed image.
        More info here: http://www.riscosopen.org/wiki/documentation/show/Compressed%20ROMs
        Makefile, h/OSEntries - Add C export of hdr/OSEntries
        hdr/HALDevice - Add device ID for Tungsten video device. Convert tabs to spaces for consistency.
        hdr/HALEntries, s/NewReset - Moved KbdFlag_* definitions to hdr/HALEntries so HALs can use them in their keyboard scan code
        s/ArthurSWIs, S/HAL, s/HeapSort, s/Kernel, s/MemInfo, s/Middle, s/NewIRQs, s/TickEvents, s/vdu/vdugrafb - Make use of BLX, BFI and long multiplies if the CPU supports them. Don't support SWI calls from thumb mode if the CPU doesn't support thumb.
        s/HAL - Made the LDMIA in Init_MapInRAM more sensible (register order was backwards). The old code did work, but wasn't doing what the comments described. Removed unused/unfinished HAL_Write0 function. Improve RISCOS_LogToPhys to check L1PT for any section mappings if the logical_to_physical call fails
        s/ModHand - Save one instruction by using ADR instead of MOV+ADD to compute lr
        s/NewReset, s/PMF/key - Pass L1PT to HAL_Reset to allow machines without hardware reset (e.g. IOMD) to perform resets by manually disabling the MMU and restarting the ROM
        s/vdu/vdudriver, s/vdu/vdugrafv - Use GVEntry macro borrowed from NVidia module for setting up the GraphicsV jump table. Make GraphicsV_ReadPaletteEntry call HAL_Video_ReadPaletteEntry if left unclaimed. Fixup GV_Render to only call HAL_Video_Render if the HAL call is implemented.
        Tested with OMAP3, IOMD & Tungsten ROMs/softloads.
      Version 5.35, Tagged as 'Kernel-5_35-4_79_2_138'
  9. 18 Feb, 2012 1 commit
    • Robert Sprowson's avatar
      Process some callbacks during module initialisation. · 07f59bea
      Robert Sprowson authored
      When in DebugROMInit=TRUE mode each call to XOS_NewLine also checks and
      processes pending callbacks (in VduLF). This makes the USB enumeration
      come out in a different order because they're all collected at the end.
      As an intermediate step, collect callbacks for DebugROMInit=FALSE too.
      Note: developers should not rely on this behaviour, this will be phased
      out before the next stable release.
      Version 5.35, Tagged as 'Kernel-5_35-4_79_2_136'
  10. 27 Nov, 2011 1 commit
    • Robert Sprowson's avatar
      Reindent Arthur2. · 2d883d8d
      Robert Sprowson authored
      Expand tabs.
      Swap DCI for instructions now Objasm 4 is out.
      Symbols for FSControl_CAT/RUN/OPT changed to non Arthur definitions.
      Still boots on IOMD class, no other testing.
      Version 5.35, Tagged as 'Kernel-5_35-4_79_2_124'
  11. 08 Aug, 2011 1 commit
    • Jeffrey Lee's avatar
      Add zero page relocation support · 2247d8e9
      Jeffrey Lee authored
        A whole mass of changes to add high processor vectors + zero page relocation support to the Cortex branch of the kernel
        At the moment the code can only cope with two ZeroPage locations, &0 and &FFFF0000. But with a bit more tweaking those restrictions can probably be lifted, allowing ZeroPage to be hidden at almost any address (assuming it's fixed at compile time). If I've done my job right, these restrictions should all be enforced by asserts.
        There's a new option, HiProcVecs, in hdr/Options to control whether high processor vectors are used. When enabling it and building a ROM, remember:
        * FPEmulator needs to be built with the FPEAnchor=High option specified in the components file (not FPEAnchorType=High as my FPEmulator commit comments suggested)
        * ShareFS needs unplugging/removing since it can't cope with it yet
        * Iyonix users will need to use the latest ROOL boot sequence, to ensure the softloaded modules are compatible (OMAP, etc. don't really softload much so they're OK with older sequences)
        * However VProtect also needs patching to fix a nasty bug there - http://www.riscosopen.org/tracker/tickets/294
        The only other notable thing I can think of is that the ProcessTransfer code in s/ARM600 & s/VMSAv6 is disabled if high processor vectors are in use (it's fairly safe to say that code is obsolete in HAL builds anyway?)
        Fun challenge for my successor: Try setting ZeroPage to &FFFF00FF (or similar) so its value can be loaded with MVN instead of LDR. Then use positive/negative address offsets to access the contents.
        File changes:
        - hdr/ARMops - Modified ARMop macro to take the ZeroPage pointer as a parameter instead of 'zero'
        - hdr/Copro15ops - Corrected $quick handling in myISB macro
        - hdr/Options - Added ideal setting for us to use for HiProcVecs
        - s/AMBControl/allocate, s/AMBControl/growp, s/AMBControl/mapslot, s/AMBControl/memmap, s/AMBControl/service, s/AMBControl/shrinkp, s/Arthur2, s/Arthur3, s/ArthurSWIs, s/ChangeDyn, s/ExtraSWIs, s/HAL, s/HeapMan, s/Kernel, s/MemInfo, s/Middle, s/ModHand, s/MoreSWIs, s/MsgCode, s/NewIRQs, s/NewReset, s/Oscli, s/PMF/buffer, s/PMF/IIC, s/PMF/i2cutils, s/PMF/key, s/PMF/mouse, s/PMF/osbyte, s/PMF/oseven, s/PMF/osinit, s/PMF/osword, s/PMF/oswrch, s/SWINaming, s/Super1, s/SysComms, s/TickEvents, s/Utility, s/vdu/vdu23, s/vdu/vdudriver, s/vdu/vdugrafl, s/vdu/vdugrafv, s/vdu/vdupalxx, s/vdu/vdupointer, s/vdu/vduswis, s/vdu/vduwrch - Lots of updates to deal with zero page relocation
        - s/ARM600 - UseProcessTransfer option. Zero page relocation support. Deleted pre-HAL ClearPhysRAM code to tidy the file up a bit.
        - s/ARMops - Zero page relocation support. Set CPUFlag_HiProcVecs when high vectors are in use.
        - s/KbdResPC - Disable compilation of dead code
        - s/VMSAv6 - UseProcessTransfer option. Zero page relocation support.
        Tested with OMAP & Iyonix ROM softloads, both with high & low zero page.
        High zero page hasn't had extensive testing, but boot sequence + ROM apps seem to work.
      Version 5.35, Tagged as 'Kernel-5_35-4_79_2_98_2_48'
  12. 22 Jan, 2003 1 commit
  13. 18 Dec, 2002 1 commit
    • Ben Avison's avatar
      Added 256-colour version of the (high-resolution only) teletext code, and... · 12055c33
      Ben Avison authored
      Added 256-colour version of the (high-resolution only) teletext code, and support for teletext when hardware scroll is disabled. Both are required for Tungsten.
      Turned off the module init/final service calls, since we still don't have an
      allocation for them.
      Upped the OS version number to 5.01.
      Version 5.35, Tagged as 'Kernel-5_35-4_79_2_53'
  14. 13 Dec, 2002 1 commit
    • Ben Avison's avatar
      HAL device support, and a couple of new service calls. · 5fa74be7
      Ben Avison authored
        * Rejigged documented meaning of device "Location" field so that we can
          fit full PCI locations in.
        * Defined lots of device "Type" values in Hdr:HALDevice.
        * Removed obsolete DMA-related HAL entries in Hdr:HALEntries (no longer
          required by DMAManager 0_15-4_4_2_6, no longer provided by Tungsten HAL
        * OS_Hardware 2 and 3 actually work now.
        * Changed OS_Hardware 4 to take a maximum major version number to match.
        * HAL workspace is now USR mode readable.
        * Service calls issued after module initialisation/finalisation (see
        OS_Hardware tested, service calls not tested.
      Version 5.35, Tagged as 'Kernel-5_35-4_79_2_52'
  15. 30 Nov, 2002 1 commit
    • Ben Avison's avatar
      Commit of kernel as featured in release 5.00. · 9664c93b
      Ben Avison authored
        Lots of changes since last version, at least the following:
        * Updated OS timestamp, removed alpha status
        * Negative INKEY OS version changed to &AA
        * GraphicsV is now alocated vector number &2A
        * ROM moved up to &FC000000
        * Max application slot increased to 512 Mbytes (for now)
        * Max size of RMA increased to 256 Mbytes
        * RMA is now first-created dynamic area (so it gets lowest address after
          top of application slot)
        * OS_Memory 10 reimplemeted
        * New OS_ReadSysInfo 6 values 18-22 added
        * OS_ReadSysInfo 8 gains flag bit to indicate soft power-off
        * Misc internal top-bit-set-address fixes
        * *ChangeDynamicArea can take sizes in megabytes or gigabytes
        * Magic word "&off" in R0 passed to OS_Reset powers down if possible
        * Added acceleration: block copy; CLS; text window scroll up; rectangle
        * Disabled LED flashing in page mode (liable to crash)
        * Masked sprite plot and VDU 5 text avoids reading the screen if possible
        * Framestore made USR mode accessible
        * Fix for VDU 5,127 bug - now relies on font definitions being in extreme
          quarters of memory, rather than bottom half
        * Allocated 64-bit OS_Convert... SWIs
        * IIC errors use allocated error numbers
        * Looks for Dallas RTC before Philips RTC because we're using a Philips
          NVRAM device with the same ID
        * Fix to bug that meant the oscillator in the Dallas RTC wasn't enabled
        * Default mouse type (USB) changed to allocated number
        * Ram disc max size increased to 128 Mbytes (Ursula merge) and made
          cacheable for StrongARMs (not XScale)
        * Branch through zero handler now works in USR mode, by use of a
          trampoline in the system stack to allow PC-relative register storage
        * Address exception handler changed to not use 0 as workspace
        * OS_Memory 13 extended to allow specification of cacheability and access
        * Added OS_Memory 16 to return important memory addresses
        * RISCOS_MapInIO() takes cacheable flag in bit 3, access permissions in
          bits 10 and 11, doubly-mapped flag in bit 20, and access permissions
          specified flag in bit 21
        * Bug fix in last version for application abort handlers didn't quite
          work; register shuffle required
        * "Module is not 32-bit compatible" error now reports the module name
        * Default configured language changed from 10 to 11 (now Desktop again)
      Version 5.35, Tagged as 'Kernel-5_35-4_79_2_51'
  16. 07 Oct, 2002 1 commit
  17. 18 Jun, 2001 1 commit
    • Mike Stephens's avatar
      Reimplement enhancements to kernel Dynamic Area support from · 3f877936
      Mike Stephens authored
      Ursula. Quite a hairy code merge really, so let's hope it is
      worth it to someone. What you get (back after 2 or 3 years):
      - much more efficient for largish numbers of DAs (relevance
        to current build = approx 0)
      - fancy reason codes to support fast update of
        Switcher bar display (relevance = 0)
      - support for clamped maximum area sizes, to avoid address
        space exhaustion with big memory (relevance = 0)
      - better implementation of shrinkable DAs, performance
        wise (if lots of DAs, relevance = approx 0)
      - support for 'Sparse' DAs. Holey dynamic areas, Batman!
        (relevance, go on someone use the darned things)
      Moderately development tested on HAL/32bit ARM9 desktop.
      Note the Switcher should be compiled to use the new
      reason codes 6&7, for fabled desktop builds.
      Also, during this work, so I could see the wood for the
      trees, redid some source code clean up, removing pre-Medusa
      stuff (like I did about 3 years ago on Ursula, sigh). That's
      why loads of source files have changed. The new DA stuff
      is confined pretty much to hdr.KernelWS and s.ChangeDyn.
      Version 5.35, Tagged as 'Kernel-5_35-4_79_2_38'
  18. 21 Nov, 2000 1 commit
    • Stewart Brodie's avatar
      32-bit kernels will refuse to initialise non 32-bit modules. · dbc48c98
      Stewart Brodie authored
        The kernel will examine all modules that it is requested to initialise
          and will refuse to initialise any module without a module flags word
          entry in its module header or with bit 0 the first flags word being
          clear (bit 0 being ModuleFlag_32bit)
        Error message added to all the messages files.
        New error block added to message counting block.  The Non-32-bit module
          message is not a cached error message, though.
        Tested in 32-bit Lazarus build.
      Version 5.38. Tagged as 'Kernel-5_38'
  19. 16 Oct, 2000 1 commit
  20. 15 Sep, 2000 1 commit
    • Kevin Bracey's avatar
      * Converted to building with ObjAsm (but still a single object file using ORG). · 49836a59
      Kevin Bracey authored
      * Added ARM_IMB and ARM_IMBRange SWIs as recommended by ARMv5.
      * Some early prototype HAL bits popped in - a lot of source restructuring still
        to come.
      * New debug target creates an AIF image with debug information, and translates
        this into an ASCII object file for the 16702B logic analyser.
      Version 5.35, Tagged as 'Kernel-5_35-4_79_2_1'
  21. 15 Aug, 2000 1 commit
    • Stewart Brodie's avatar
      Fixed minor bug in module initialisation. · efd9b01e
      Stewart Brodie authored
        Added common error cache.
        Fixed module header validation code which was broken in 5.22.  This
          shouldn't have caused much of a problem as it was only a bizarre
          check (SWI chunk looked valid but SWI handler was 0) that would
          have failed - but be reported as a valid set of SWI entries.
        Added common error message cache.  Several common errors (Buffer
          overflow; Number not recognised; Bad vector release; and a couple
          of others) are now cached the first time they are translated into
          a block of memory in the system heap.
        Tested in Ursula build - cacheing only active in Ursula build - change
          HdrSrc if you want it in your products too.
        Requires HdrSrc 0.94
      Version 5.31. Tagged as 'Kernel-5_31'
  22. 04 Apr, 2000 1 commit
    • Kevin Bracey's avatar
      32-bit Kernel. · b4016e9c
      Kevin Bracey authored
        The Kernel will now compile to produce a pure 32-bit system if No26bitCode is
        set to TRUE.
        If No26bitCode is FALSE, then the Kernel will be a standard 26-bit Kernel,
        although some internal changes have taken place to minimise compile
        switches between the two cases. See Docs.32bit for more technical info.
        The hardest part was the flood-fill...
      Other changes:
        Pointer shape changes now take place on the next VSync, rather than actually
        WAITING for the VSync. Turning the Hourglass on shouldn't slow your machine
        down by 5% now :)
        Lots of really crusty pre-IOMD code removed.
        Tested in 32 and 26-bit forms in a limited desktop build. Basically, this
        will need to see a lot of use to iron out difficulties. I'd like anyone who
        has a non-frozen project to at least attempt using this Kernel.
      Version 5.23. Tagged as 'Kernel-5_23'
  23. 19 Aug, 1999 1 commit
  24. 17 Aug, 1999 1 commit
  25. 03 Aug, 1999 2 commits
  26. 12 May, 1999 1 commit
  27. 07 May, 1999 1 commit
  28. 01 Oct, 1998 1 commit
    • Kevin Bracey's avatar
      Following changes folded in from the start of the Ursula branch: · 4a34da4f
      Kevin Bracey authored
      CPU type messages internationalised.
      "Unknown OS_PlatformFeatures reason code" internationalised.
      RunningOnEmul flag tweaked.
      MorrisIDString conditional removed.
      New modules added to SWI list at the end of the chain, on grounds that
      the first-registered modules are probably more important.
      *ChangeDynamicArea moved into UtilityModule from TaskManager.
      Version 4.65. Tagged as 'Kernel-4_65'
  29. 21 Jan, 1997 1 commit
  30. 06 Nov, 1996 1 commit
  31. 05 Nov, 1996 1 commit