1. 02 Mar, 2020 1 commit
    • ROOL's avatar
      Record various numbers used in other strands of RISC OS and compatible systems · 81b079e8
      ROOL authored
        * various low-numbered dynamic areas used by RISC OS 6 and Pyromaniac
        * OS_ReadSysInfo 8 host platform classes for VirtualRPC, A9Home, Pyromaniac
        * OS_Byte 0,<not 0> MosVer values for various systems since the BBC micro
        * OS_Byte 129,0,255 (BASIC INKEY -256) values for various RISC OS systems
        Discovered that these weren't really recorded anywhere during recent
        allocation request. Some information gleaned from http://beebwiki.mdfs.net
      Version 6.34. Not tagged
  2. 09 Nov, 2019 1 commit
  3. 20 Oct, 2019 2 commits
  4. 21 Feb, 2018 1 commit
    • Jeffrey Lee's avatar
      Make it easier to debug aborts that were triggered by ABT/UND code · ed1b4b5b
      Jeffrey Lee authored
        s/Middle - Tweak register dump generation so that it'll attempt to provide sensible R13 & R14 values if the abort came from the same mode that we're handling the abort in. R13 will be adjusted by however much data we've pushed onto the stack, and R14 will be set to &DEADDEAD to indicate that the CPU has corrupted it and we don't know what the original value was.
        Tested on BB-xM
      Version 5.98. Tagged as 'Kernel-5_98'
  5. 18 Jun, 2017 1 commit
    • ROOL's avatar
      Fix to OS_ReadSysInfo 1 · 698e5e6d
      ROOL authored
        Prior to ScreenModes starting (when CurrentMonitorType becaomes 7) this SWI would return Auto as 31 for EDID rather than -1, as would be the case had ReadMultiField been called.
        Change to use -1 for consistency and so it gets translated to type 3 (VGA).
        Submission from Willi Theiss.
      Version 5.85. Tagged as 'Kernel-5_85'
  6. 05 Mar, 2017 1 commit
    • ROOL's avatar
      Extend MonitorType configure keyword · 4d017eb3
      ROOL authored
        Accept a monitortype of 'EDID' (as distinct from 'Auto', which uses the ID pins) to force the kernel, via ScrModes, to use the native screen mode prior to executing the boot sequence.
        Required for discless boot, this also helps if the boot sequence fails, the desktop will be entered in the monitor's native resolution, or a fallback if GraphicsV rejects that.
        The allocation of the EDID monitor type has been carefully selected to degrade to 'Auto' when used with an older OS. That way the configuration in CMOS is safe to use with softloads on top of older physical ROMs.
        When OS_ScreenMode is queried return the 'Auto' type, ie. at an API level there's no distinction.
        Requires HdrSrc-2_67.
        Submission for the EDID bounty.
      Version 5.80. Tagged as 'Kernel-5_80'
  7. 08 Aug, 2016 1 commit
  8. 30 Jun, 2016 3 commits
    • Jeffrey Lee's avatar
      Delete lots of old switches · f655fcf6
      Jeffrey Lee authored
        This change gets rid of the following switches from the source (picking appropriate code paths for a 32bit HAL build):
        * FixCallBacks
        * UseProcessTransfer
        * CanLiveOnROMCard
        * BleedinDaveBell
        * NewStyleEcfs
        * DoVdu23_0_12
        * LCDPowerCtrl
        * HostVdu
        * Print
        * EmulatorSupport
        * TubeInfo
        * AddTubeBashers
        * TubeChar, TubeString, TubeDumpNoStack, TubeNewlNoStack macros
        * FIQDebug
        * VCOstartfix
        * AssemblingArthur (n.b. still defined for safety with anything in Hdr: which uses it, but not used explicitly by the kernel)
        * MouseBufferFix
        * LCDInvert
        * LCDSupport
        * DoInitialiseMode
        * Interruptible32bitModes
        * MouseBufferManager
        * StrongARM (new CacheCleanerHack and InterruptDelay switches added to hdr/Options to cover some functionality that StrongARM previously covered)
        * SAcleanflushbroken
        * StrongARM_POST
        * IrqsInClaimRelease
        * CheckProtectionLink
        * GSWorkspaceInKernelBuffers
        * EarlierReentrancyInDAShrink
        * LongCommandLines
        * ECC
        * NoSPSRcorruption
        * RMTidyDoesNowt
        * RogerEXEY
        * StorkPowerSave
        * DebugForcedReset
        * AssembleKEYV
        * AssemblePointerV
        * ProcessorVectors
        * Keyboard_Type
        Assorted old files have also been deleted.
        Identical binary to previous revision for IOMD & Raspberry Pi builds
      Version 5.51. Tagged as 'Kernel-5_51'
    • Jeffrey Lee's avatar
      Delete STB code · 9a571a08
      Jeffrey Lee authored
        This change gets rid of the following switches from the source (picking appropriate code paths for a desktop build):
        * STB
        * RO371Timings
        * NormalSpeedROMS
        * AutoSpeedROMS
        * RISCPCBurstMode
        * InterlacedPointer
        * ParallelFlashUpgrade (and s/FlashROM file)
        * Embedded_UI
        Some of the deleted code might be worth revisiting in future:
        * OS_ReadSysInfo 4 support for storing the MAC in alternate CMOS locations (including 2nd copy for error checking) or fetching via Service_MachineAddress
        * Mouse handling changes, possibly aimed at hiding the mouse pointer if a mouse isn't connected
        * More strict CMOS validation in s/NewReset
        Identical binary to previous revision for IOMD & Raspberry Pi builds
      Version 5.50. Tagged as 'Kernel-5_50'
    • Jeffrey Lee's avatar
      Delete pre-HAL and 26bit code · 7d5bfc66
      Jeffrey Lee authored
        This change gets rid of the following switches from the source (picking appropriate code paths for a 32bit HAL build):
        * HAL
        * HAL26
        * HAL32
        * No26bitCode
        * No32bitCode
        * IncludeTestSrc
        * FixR9CorruptionInExtensionSWI
        Various old files have also been removed (POST code, Arc/STB keyboard drivers, etc.)
        Identical binary to previous revision for IOMD & Raspberry Pi builds
      Version 5.49. Tagged as 'Kernel-5_49'
  9. 19 May, 2016 1 commit
    • Jeffrey Lee's avatar
      Add new OS_PlatformFeatures reason code for reading CPU features (inspired by... · 9944f0f8
      Jeffrey Lee authored
      Add new OS_PlatformFeatures reason code for reading CPU features (inspired by ARMv6+ CPUID scheme). Add OS_ReadSysInfo 8 flags for indicating the alignment mode the ROM was built with. Fix long-standing bug with OS_PlatformFeatures when an unknown reason code is used.
        s/CPUFeatures, hdr/OSMisc, hdr/KernelWS - Code and definitions for reading CPU features and reporting them via OS_PlatformFeatures 34. All the instruction set features which are exposed by the CPUID scheme and which are relevant to RISC OS are exposed, along with a few extra flags which we derive ourselves (e.g. things relating to < ARMv4, and some register usage restrictions in instructions). s/CPUFeatures is designed to be easily copyable into a future version of CallASWI without requiring any changes.
        s/ARMops - Read and cache CPU features during ARMop initialisation
        s/GetAll - GET new file
        s/Kernel - Hook up the CPU features code to OS_PlatformFeatures. Fix a long standing stack imbalance bug (fixed in RISC OS 3.8, but never merged back to our main branch) which meant that calling OS_PlatformFeatures with an invalid reason code would raise an error, even if it was the X form of the SWI that was called. Similar fix also applied to the unused service call code, along with a fix for the user's R1-R9 being corrupt (shuffled up one place) should an error have been generated.
        s/MemInfo - Extra LTORG needed to keep things happy
        s/Middle - Extend OS_ReadSysInfo 8 to include flags for indicating what memory alignment mode (if any) the OS relies upon. Together with OS_PlatformFeatures 34 this could e.g. be used by !CPUSetup to determine which options should be offered to the user.
        Tested on Raspberry Pi 1, 2, 3
      Version 5.35, Tagged as 'Kernel-5_35-4_79_2_319'
  10. 05 Apr, 2016 1 commit
    • Jeffrey Lee's avatar
      Add SWI error pointer validation, SeriousErrorV hooks, and OS_ReadSysInfo 15 · b4cf3959
      Jeffrey Lee authored
        Resources/UK/Messages, hdr/KernelWS, s/Kernel - On return from a SWI with V set, do some basic validity checks on the error pointer in order to try and catch buggy SWIs that return bad pointers or invalid error blocks. If a bad pointer is found we'll substitute it with a pointer to a different error block, which has the SWI number in the error message, to allow the user to identify the source of the problem. (There's also a chance we'll crash when investigating a bad pointer, but crashing here in the kernel is preferable to crashing elsewhere because R12 should still contain the SWI number)
        hdr/OSMisc - Define SeriousErrorV reason codes and extended ROM footer entry IDs
        hdr/Options - Remove HangWatch integration flag, obsolete now that SeriousErrorV is available
        s/ArthurSWIs - Keep defaultvectab up to date with vector allocations
        s/Middle - Update serious error handling to call SeriousErrorV at several key points. This allows for accurate crash dumps to be obtained, along with a mechanism to warn low-level components such as RTSupport that the privileged mode stacks are being flattened.
        s/Middle - Add OS_ReadSysInfo 15, for enumerating extended ROM footer entries
        s/PMF/osbyte - Update InitNewFX0Error to use the ROM footer entry ID defined in hdr/OSMisc
        Tested on Pi 1B, 2B, 3B
      Version 5.35, Tagged as 'Kernel-5_35-4_79_2_313'
  11. 05 Jan, 2016 1 commit
    • Robert Sprowson's avatar
      Add OS_ReadSysInfo 9,6 and 9,7 · ea837302
      Robert Sprowson authored
      Subreason 7 returns a string naming the HAL platform. Use HAL entry 97 to get this, and obsolete 97/98/99 in favour of using a HAL device. Line up the HAL video entries to match the others.
      Subreason 6 is just back filling one ROL added, testing this on RISC OS Select just returned the OS name so we do the same now (same as subreason 0, not sure what ROL's distinction was for).
      Allocate a HAL device for PATA IDE controllers, and the 2 known ones to date - Tungsten and IOMD systems.
      Version 5.35, Tagged as 'Kernel-5_35-4_79_2_301'
  12. 07 Oct, 2015 1 commit
    • Jeffrey Lee's avatar
      Fix handling of FIQ mode exceptions · 5565e4ca
      Jeffrey Lee authored
        s/Middle - When handling an FIQ-mode exception, protect the register dump pointer around the call to HAL_FIQDisableAll
        Tested on Raspberry Pi
        Fixes data abort within kernel when an abort occurs is FIQ mode
      Version 5.35, Tagged as 'Kernel-5_35-4_79_2_292'
  13. 31 Aug, 2015 1 commit
    • Jeffrey Lee's avatar
      Add initial support for "physical memory pools" · 54872d8c
      Jeffrey Lee authored
        This set of changes adds support for "physical memory pools" (aka PMPs), a new type of dynamic area which allow physical pages to be claimed/allocated without mapping them in to the logical address space. PMPs have full control over which physical pages they use (similar to DAs which request specific physical pages), and also have full control over the logical mapping of their pages (which pages go where, and per-page access/cacheability control).
        Currently the OS makes use of two PMPs: one for the free pool (which now has a logical size of zero - freeing up gigabytes of logical space), and one for the RAM disc (logical size of 1MB, allowing for a physical size limited only by the amount of free memory)
        Implementing these changes has required a number of other changes to be made:
        * The CAM has been expanded from 8 bytes per entry to 16 bytes per entry, in order to allow each RAM page to store information about its PMP association
        * The system heap has been expanded to 32MB in size (from just under 4MB), in order to allow it to be used to store PMP page lists (1 word needed per page, but PMP pages may not always have physical pages assigned to them - so to allow multiple large PMPs to exist we need more than just 1 word per RAM page)
        * The &FA000000-&FBFFFFFF area of fixed kernel workspace has been shuffled around to accomodate the larger CAM, and the system heap is now located just above the RMA.
        * SoftResets code stripped out (unlikely we'll ever want to fix and re-enable it)
        * A couple of FastCDA options are now permanently on
        * Internal page flags shuffled around a bit. PageFlags_Unavailable now publicly exposed so that PMP clients can lock/unlock pages at will.
        * When OS_ChangeDynamicArea is asked to grow or shrink the free pool, it now implicitly converts it into a shrink or grow of application space (which is what would happen anyway). This simplifies the implementation; during a grow, pages (or replacement pages) are always sourced from the free pool, and during a shrink pages are always sent to the free pool.
        File changes:
        - hdr/KernelWS - Extend DANode structure. Describe CAM format. Adjust kernel workspace.
        - hdr/OSRSI6, s/Middle - Add new item to expose the CAM format
        - hdr/Options - Remove SoftResets switch. Add some PMP switches.
        - s/ARM600, s/VMSAv6 - Updated for new CAM format. Note that although the CAM stores PMP information, BangCamUpdate currently doesn't deal with updating that data - it's the caller's responsibility to do so where appropriate.
        - s/ChangeDyn - Lots of changes to implement PMP support, and to cope with the new CAM format.
        - s/HAL - Updated to cope with new CAM format, and lack of logical mapping of free pool.
        - s/MemInfo - Updated to cope with new CAM format. OS_Memory 0 updated to cope with converting PPN to PA for pages which are mapped out. OS_Memory 24 updated to decode the access permissions on a per-page basis for PMPs, and fixed its HWM usage for sparse DAs.
        - s/NewReset - Soft reset code and unused AddCamEntries function removed. Updated to cope with new CAM format, PMP free pool, PMP RAMFS
        - s/AMBControl/allocate - Update comment (RMA hasn't been used for AMBControl nodes for a long time)
        - s/AMBControl/growp, s/AMBControl/memmap, s/AMBControl/shrinkp - Update for new CAM format + PMP free pool
        - s/vdu/vdudriver - Strip out soft reset code.
        Tested on Pandaboard
        This is just a first iteration of the PMP feature, with any luck future changes will improve functionality. This means APIs are subject to change as well.
      Version 5.35, Tagged as 'Kernel-5_35-4_79_2_284'
  14. 05 Aug, 2015 1 commit
    • Jeffrey Lee's avatar
      Improve support for VMSAv6 cache policies & memory types. Expose raw ARMops... · afb010f2
      Jeffrey Lee authored
      Improve support for VMSAv6 cache policies & memory types. Expose raw ARMops via OS_MMUControl & cache information via OS_PlatformFeatures.
        Docs/HAL/ARMop_API - Document two new ARMops: Cache_Examine and IMB_List
        hdr/KernelWS - Shuffle workspace round a bit to allow space for the two new ARMops. IOSystemType now deleted (has been deprecated and fixed at 0 for some time)
        s/ARM600 - Cosmetic changes to BangCam to make it clearer what's going on. Add OS_MMUControl 2 (get ARMop) implementation.
        s/ARMops - Switch out different ARMop implementations and XCB tables depending on MMU model - helps reduce assembler warnings and make it clearer what code paths are and aren't possible. Add implementations of the two new ARMops. Simplify ARM_Analyse_Fancy by removing some tests which we know will have certain results. Use CCSIDR constants in ARMv7 ARMops instead of magic numbers. Update XCB table comments, and add a new table for VMSAv6
        s/ChangeDyn - Define constant for the new NCB 'idempotent' cache policy (VMSAv6 normal, non-cacheable memory)
        s/HAL - Use CCSIDR constants instead of magic numbers. Extend RISCOS_MapInIO to allow the TEX bits to be specified.
        s/Kernel - OS_PlatformFeatures 33 (read cache information) implementation (actually, just calls through to an ARMop)
        s/MemInfo - Modify VMSAv6 OS_Memory 0 cache/uncache implementation to use the XCB table instead of modifying L2_C directly. This allows the cacheability to be changed without affecting the memory type - important for e.g. unaligned accesses to work correctly. Implement cache policy support for OS_Memory 13.
        s/Middle - Remove IOSystemType from OS_ReadSysInfo 6.
        s/VMSAv6 - Make sure BangCam uses the XCB table for working out the attributes of temp-uncacheable pages instead of manipulating L2_C directly. Add OS_MMUControl 2 implementation.
        s/AMBControl/memmap - Update VMSAv6 page table pokeing to use XCB table
        s/PMF/osinit - Remove IOSystemType reference, and switch out some pre-HAL code that was trying to use IOSystemType.
        Tested on Iyonix, ARM11, Cortex-A7, -A8, -A9, -A15
        Note that contrary to the comments in the source the default NCB policy currently maps to VMSAv6 Device memory type (as per previous kernel versions). This is just a temporary measure, and it will be switched over to Normal, non-cacheable once appropriate memory barriers have been added to the affected IO code.
      Version 5.35, Tagged as 'Kernel-5_35-4_79_2_273'
  15. 17 Jul, 2015 1 commit
    • Jeffrey Lee's avatar
      Expose more areas via OS_ReadSysInfo 6 & OS_Memory 16. Expose processor... · 5e6fd146
      Jeffrey Lee authored
      Expose more areas via OS_ReadSysInfo 6 & OS_Memory 16. Expose processor vectors base + size via OS_PlatformFeatures.
        hdr/KernelWS - Define processor vectors address. Currently same as ZeroPage, but in the future will differ for some machines.
        hdr/OSRSI6, s/Middle - Expose VecPtrTab & NVECTORS via OS_ReadSysInfo items 85 & 86
        s/Kernel - Add OS_PlatformFeatures 32, for returning the base + size of the processor vectors
        s/MemInfo - Add areas 12 thru 15 to OS_Memory 16, for reporting ZeroPage, ProcVecs, DebuggerSpace and ScratchSpace. The task manager can now use these for calculating memory usage instead of assuming 32K workspace from &0-&8000.
        Tested on Raspberry Pi
      Version 5.35, Tagged as 'Kernel-5_35-4_79_2_271'
  16. 13 Jul, 2015 1 commit
    • Jeffrey Lee's avatar
      Fix software pointer being enabled when it isn't needed. Improve HangWatch support. · 0da882fd
      Jeffrey Lee authored
        s/vdu/vdupointer - For any mode where the software pointer is usable, RestorePointer was restoring the software pointer regardless of whether it was in use at the time RemovePointer was called. This would cause both the software & hardware pointers to be briefly enabled at the same time, potentially causing flickering or other glitches. Fix the issue by making sure RestorePointer only restores if the software pointer was actually in use at the time RemovePointer was called. Also, attempt to deal with the situation where the pointer might have moved to a location where the software pointer is no longer required.
        s/Middle - Improve integration of HangWatch with the abort handler - avoid overwriting the top of the SVC stack so that it can be preserved for the HangWatch dump.
        Tested on Raspberry Pi
      Version 5.35, Tagged as 'Kernel-5_35-4_79_2_270'
  17. 29 Mar, 2015 1 commit
    • Jeffrey Lee's avatar
      Fix OS_Byte 19 getting stuck if it's called just before the screen blanker... · f17af1cf
      Jeffrey Lee authored
      Fix OS_Byte 19 getting stuck if it's called just before the screen blanker activates. Add new OS_ReadSysInfo reason code for determining IIC bus count.
        s/PMF/osbyte - For OS_Byte 19, move screen blanker check (and current GraphicsV driver check) inside the WFI loop so that the loop will terminate if the screen should blank (or current GraphicsV driver should die) before the next VSync occurs. Also move the Portable_Idle call to before the interrupt trigger - the old location meant that if the screen blanked we'd continue on to the Portable_Idle call and end up pointlessly stalling the system
        s/Middle - Add OS_ReadSysInfo 14, as a legitimate way of finding the number of IIC buses present on the system
        Tested on Pandaboard
      Version 5.35, Tagged as 'Kernel-5_35-4_79_2_261'
  18. 06 Dec, 2014 1 commit
    • Robert Sprowson's avatar
      Fixes to HAL memory info calls and docs · 75de3830
      Robert Sprowson authored
       Several places in this code called the HAL or other ATPCS defined functions like memset() and hoped that the overall result was V clear. If any of them accidentally set V (for example a CMP that straddles 0x80000000) you ended up trying to look up an international error at the address of the reason code to OS_Memory.
       Now, explicitly clear V in the non error cases where an ATPCS function was called.
       Change the HAL_PhysInfo call to expect a physical ROM size back as an inclusive range, to match the RAM range subreason code. Add 1 to correct for this. A value of 0 & 0 is taken to mean "no physical ROM" as before.
       Document that 255 means "no IOMD" or "no VIDC", that's what the HALs have been using since year dot.
      Version 5.35, Tagged as 'Kernel-5_35-4_79_2_248'
  19. 29 Aug, 2014 1 commit
    • Jeffrey Lee's avatar
      Add more HAL USB definitions to hdr/HALEntries. Add debug option for calling... · 371f701c
      Jeffrey Lee authored
      Add more HAL USB definitions to hdr/HALEntries. Add debug option for calling HangWatch_Dump on serious errors.
        hdr/HALEntries - Added definition of the struct returned by HAL_USBControllerInfo
        hdr/Options, s/Middle - Added the option to call HangWatch_Dump on serious errors
        Tested on BB-xM
      Version 5.35, Tagged as 'Kernel-5_35-4_79_2_235'
  20. 20 Apr, 2014 1 commit
    • Jeffrey Lee's avatar
      Add OS_Memory 24 implementation. Change OS_ValidateAddress to use it. Fix... · 03d3b37a
      Jeffrey Lee authored
      Add OS_Memory 24 implementation. Change OS_ValidateAddress to use it. Fix kernel leaving the physical access MB in a messy state. Try and protect against infinite abort loops caused by bad environment handlers.
        s/MemInfo - Added an implementation of ROL's OS_Memory 24 call. Unlike the old OS_ValidateAddress call, this call should successfully report the presence of all memory areas known to the kernel. It should also correctly indicate which parts of a sparse DA are mapped in, unlike the old OS_ValidateAddress implementation.
        s/ChangeDyn - Update dynamic area handling to construct a lookup table for mapping logical addresses to dynamic areas; this is used by OS_Memory 24 to quickly locate which DA(s) hit a given region
        s/AMBControl/main - Make sure lazy task swapping is marked as disabled when AMB_LazyMapIn is {FALSE} - required so that OS_Memory 24 will give application space the correct flags
        s/ArthurSWIs - Switch OS_ValidateAddress over to using OS_Memory 24, as per ROL. For compatibility, Service_ValidateAddress is still issued for any areas which the kernel doesn't recognise (currently, OS_Memory 24 doesn't issue any service calls itself)
        s/Convrsions - ADR -> ADRL to keep things happy
        s/HAL - Fix L2PT page allocation and RAM clear to release the physical access region once they're done with it
        s/Kernel - Make the error dispatcher validate the error handler code ptr & error buffer using OS_Memory 24 before attempting to use them. If they look bad, reset to default. Should prevent getting stuck in an infinite abort loop in some situations (e.g. as was the case with ticket 279). The system might not fully recover, but it's better than a hard crash.
        s/Middle - Rework data/prefetch/etc. abort handlers so that DumpyTheRegisters can validate the exception dump area via OS_Memory 24 before anything gets written to it. Should also help to prevent some infinite abort loops. Strip 26bit/pre-HAL code to make things a bit more readable.
        hdr/KernelWS - Update comment
        Tested on BB-xM, Raspberry Pi
      Version 5.35, Tagged as 'Kernel-5_35-4_79_2_222'
  21. 06 Aug, 2013 1 commit
    • Jeffrey Lee's avatar
      Add support for the new RISC OS 5 style sprite mode word. Add partial support... · 57d1a29d
      Jeffrey Lee authored
      Add support for the new RISC OS 5 style sprite mode word. Add partial support for alpha channel sprite masks. Implement OS_ScreenMode reasons 13-15
        - hdr/PublicWS - Add ECFShift and ECFYOffset to list of public exports (SpriteExtend was using hardcoded values). Rearrange exports so that VduWorkspace exports are now labelled as such.
        - hdr/KernelWS - Make sure ECFShift & ECFYOffset match their exported locations
        - hdr/OSRSI6, s/Middle - Add OS_ReadSysInfo 6 items 83 & 84, for reading ECFYOffset and ECFShift locations
        Mode flags/VDU variables:
        - Makefile - Add hdr/VduExt to the C header exports
        - hdr/VduExt - Get rid of NotRVVTBarWobblyBits macro and defined VDU variables manually so that Hdr2H will handle them. Begin replacing overly generic 'Flag_*' mode flag definitions with 'ModeFlag_*' instead. Define new flags as required by the new screen/sprite modes. Add OS_ScreenMode reason codes and mode selector format (from s.vdu.vdudecl)
        - NewModes/NEWF2, NewModes/OldPSSrc, NewModes/PSSrc, s.vdu.vdu23, s.vdu.vducursoft, s.vdu.vdudriver, s.vdu.vdugrafg, s.vdu.vdugrafj, s.vdu.vdugrafl, s.vdu.vdumodes, s.vdu.vdupal10, s.vdu.vdupal20, s.vdu.vdupalette, s.vdu.vdupalxx, s.vdu.vduwrch - Renaming Flag_* to ModeFlag_*
        - s.vdu.vdudecl - Remove OS_ScreenMode reason codes & mode selector format definitions; these are now in hdr/VduExt. Flag_* -> ModeFlag_* renaming.
        - s.vdu.vdupalxx - Apply a greyscale palette in PV_SetDefaultPalette if the greyscale mode flag is set
        New sprite types:
        - s.vdu.vdudriver - Extend GenerateModeSelectorVars to deal with the wide mask flag, 64K sprites, and the new RISC OS 5 sprite mode word format.
        - s.vdu.vdugrafdec - Store more information about the sprite in the SprReadNColour ... SprLog2BPC block.
        - s.vdu.vdugrafg - Update SpriteVecHandler to be able to detect whether RISC OS 5 format sprites are allowed palettes. Update SetupSprModeData to store the extra sprite info that's defined in vdugrafdec. Update PutSprite to fault any sprites with wide masks - SpriteExtend must be used for that (once implemented!)
        - s.vdu.vdugrafh - Update WritePixelColour to avoid temporary poking of NColour VDU variable for 8bpp sprites. Correctly replicate data when writing to RISC OS 5 format sprites. Update ReadPixelMask, WritePixelMask, SpriteMaskAddr, GetMaskspWidth to deal with wide masks. Delete obsolete bounce_new_format_masks routine.
        - s.vdu.vdugrafi - Comment updated to reflect new reality
        - s.vdu.vdugrafj - Get rid of unused code block in CreateHeader/PostCreateHeader. Update SanitizeSGetMode to generate RISC OS 5 style sprite mode words where applicable. Update DecideMaskSize to rely on GetMaskspWidth for calculating mask width.
        - s.vdu.vdugrafl - Update SwitchOutputToSprite/SwitchOutputToMask to deal with the new sprite formats. Allow PushModeInfoAnyMonitor to fail.
        - s.vdu.vduswis - Extended OS_ReadModeVariable to cope with new sprite types
        - s.vdu.vdudriver - Fixed bug with VIDCList copying where any -1 value in the structure would terminate the copy, instead of only -1 as a control item number
        - s.vdu.vduswis - Implemented OS_ScreenMode 13 (Mode string to specifier), 14 (mode specifier to string), and 15 (set mode by string). Mostly as per ROL's specs, but minus support for teletext attributes, and plus support for new RISC OS 5 attributes (L... layout specifier, 4096 & 24bpp packed modes, etc.)
        - s.vdu.vduwrch - Pick correct default text colours for the new modes
        Tested on BB-xM
        Part of an implementation of the Extended Framebuffer Format spec:
      Version 5.35, Tagged as 'Kernel-5_35-4_79_2_194'
  22. 07 Apr, 2013 1 commit
    • Jeffrey Lee's avatar
      Adjust handling of OS_ReadSysInfo 4 · f71d7180
      Jeffrey Lee authored
        s/Middle - If the HAL provides an extended machine ID, make sure OS_ReadSysInfo 4 doesn't return a MAC address. This is because the old-style machine ID which the MAC is extracted from will be completely synthetic and is so known not to contain a MAC (even if it may look like it does)
        Tested on BB-xM, Raspberry Pi
      Version 5.35, Tagged as 'Kernel-5_35-4_79_2_188'
  23. 28 Mar, 2013 1 commit
    • Jeffrey Lee's avatar
      Teach the kernel about different memory attributes · c40b2dba
      Jeffrey Lee authored
        Briefly, this set of changes:
        * Adjusts PhysRamTable so that it retains the flags passed in by the HAL from OS_AddRAM (by storing them in the lower 12 bits of the size field)
        * Sorts the non-VRAM entries of PhysRamTable by speed and DMA capability, to ensure optimal memory allocation during OS startup.
        * Adjust the initial memory allocation logic to allow the cursor/sound chunk and HAL noncacheable workspace to come from DMA capable memory
        * Extends OS_Memory 12 to accept a 'must be DMA capable' flag in bit 8 of R0. This is the same as available in ROL's OS.
        * Extends OS_DynamicArea 0 to allow the creation of dynamic areas that automatically allocate from DMA capable memory. In ROL's OS this was done by setting bit 12 of R4, but we're using bits 12-14 for specifying the cache policy, so instead bit 15 is used.
        * Fixes OS_ReadSysInfo 6 to return the correct DevicesEnd value now that the IRQ/device limit is computed at runtime
        File changes:
        * hdr/OSEntries - Add definitions of the various flags passed to OS_AddRAM by the HAL. Add a new flag, NoDMA, for memory which can't be used for DMA.
        * hdr/KernelWS - Tidy PhysRamTable definition a bit by removing all the DRAM bank definitions except the first - this makes it easier to search for code which is interacting with the table. Remove VRAMFlags, it's redundant now that the flags are kept in the table. Add DMA allocation info to InitWs.
        * s/AMBControl/memmap - Updated to mask out the flags from PhysRamTable when reading RAM block sizes.
        * s/ARM600 - Strip out a lot of IOMD specific pre-HAL code.
        * s/ChangeDyn - Updated to cope with the flags stored in PhysRamTable. Implement support for DMA-capable dynamic areas. Rewrite InitDynamicAreas to insert pages into the free pool in the right order so that the fastest memory will be taken from it first.
        * s/GetAll, s/Middle - Fix OS_ReadSysInfo 6 to return the correct HAL-specific DevicesEnd value
        * s/HAL - Significant rework of initial RAM allocation code to allow the kernel workspace to come from the fastest DMA incapable RAM, while also allowing allocation of DMA capable memory for HAL NCNB workspace & kernel cursor/sound chunks. ClearPhysRAM rewritten as part of this.
        * s/MemInfo - Updated to cope with the flags stored in PhysRamTable. Add support for the new OS_Memory 12 flag. Update OS_Memory 7 to not assume PhysRamTable entries are sorted in address order, and rip out the old pre-HAL IOMD implementation.
        * s/NewReset - Remove GetPagesFromFreePool option, assume TRUE (as this has been the case for the past 10+ years). Revise a few comments and strip dead code. Update to cope with PhysRamTable flags.
        * s/VMSAv6 - Remove a couple of unused definitions
        * s/vdu/vdudriver - Update to cope with PhysRamTable flags
        Tested in Kinetic RiscPC ROM softload, Iyonix softload, & OMAP3
      Version 5.35, Tagged as 'Kernel-5_35-4_79_2_186'
  24. 10 Jan, 2013 1 commit
    • Robert Sprowson's avatar
      Add OS_NVMemory 6 · b9898460
      Robert Sprowson authored
      Permits applications to query what value would be used in the event of a CMOS reset for a given configure value. Notably, the configure plugins will use this in favour of 'ResetCMOS'.
      hdr/Options: retire the 'Select16BitSound' switch, add comment for ChecksumCMOS switch
      hdr/KernelWS: DuffEntry and Nowhere moved here
      Kernel.s: Unused OSMD removed, retire single use of SPIRQ in favour of r13_irq
      Middle.s: Retire SPIRQ
      NewReset.s: Trim out 300+ lines of CMOS reset defaults, call OS_NVMemory 6 instead
      PMF/i2cutils.s: CMOS reset default code and table moved here with refactoring
      Note, the previous code preserved YearCMOS during the zeroing, only to unconditionally write it later - so have removed it from the zeroing step.
      Note, the locations 80-111 are now considered as system CMOS in the allocations hence are now wiped too (previously they got skipped as user CMOS during R-power-on).
      Tested on OMAP3 ROM with delete-power-on and R-power-on variants, and a simple BASIC program to read locations 0-255 via OS_NVMemory.
      Version 5.35, Tagged as 'Kernel-5_35-4_79_2_180'
  25. 05 Dec, 2012 1 commit
    • Jeffrey Lee's avatar
      Add support for new extended internal key codes, low level key codes, and key handler format · bcb499b5
      Jeffrey Lee authored
        s/Middle - Added OS_ReadSysInfo 13 to allow the kernel to validate a key handler before the owner attempts to install it
        Resources/UK/Messages - Text for new "Bad key handler" error
        s/GetAll, s/PMF/Def - Get rid of now obsolete s/PMF/Def file. It only contained definitions for pre-HAL hardware, and for the key handler layout (now in Hdr:Keyboard)
        hdr/KeyWS - Increased size of KeysDown array so it can hold 768 keys instead of 160. Trim a couple of obsolete variables, and increase CurrKey/OldKey from 1 byte to 4 bytes.
        s/PMF/key, s/PMF/osbyte - Main bulk of the changes for the new key handling. All the important interfaces are now able to deal with extended (i.e. > 8 bit) internal key numbers, and the kernel is able to cope with key handlers which use 16 bit internal/low level key numbers instead of 8 bit.
        Tested on Pandora & BB-xM
        Requires HdrSrc-2_20
      Version 5.35, Tagged as 'Kernel-5_35-4_79_2_178'
  26. 01 Jul, 2012 1 commit
    • Robert Sprowson's avatar
      Sort out SetBorder · fe354937
      Robert Sprowson authored
      The one remaining use of SetBorder was to denote the user asked for and got a CMOS reset, which in the HAL case emitted a warning because setting the border is potentially complicated/slow.
      To solve this, the reset is noted and replaces the normal RISC OS banner with a warning message. The behaviour and text for this comes from the BBC Master, though the escape key is used in place of break since a reset isn't actually needed.
      Moved the unused cputable inside its corresponding switch.
      Two occurrences of WriteS_Translated would have executed the message in the V=1 case.
      Flag added to workspace, translation added to messages files.
      Commented out use of SetBorder removed.
      SetBorder macro removed.
      Switched out use of SetBorder removed.
      Conditional WriteS_Translated would try to execute the message in the opposite condition case.
      Version 5.35, Tagged as 'Kernel-5_35-4_79_2_157'
  27. 26 Jun, 2012 1 commit
  28. 24 Jun, 2012 1 commit
  29. 21 Jun, 2012 1 commit
    • Robert Sprowson's avatar
      Fix failure to boot with exactly 16MB of RAM · a790a6c2
      Robert Sprowson authored
      With no VRAM, in Kernerl.s.HAL line 370, the less than 16M case sets aside half the RAM as available for video (more than, it uses no more than 32M) but the exactly equals 16M case set aside none.
      Add some exports to hdr.HALEntries to define the subreasons to OS_Hardware.
      Version 5.35, Tagged as 'Kernel-5_35-4_79_2_154'
  30. 25 Feb, 2012 1 commit
    • Jeffrey Lee's avatar
      Add compressed ROM support. Make more use of ARMv5+ instructions. Other misc tweaks. · 538f3c24
      Jeffrey Lee authored
        hdr/OSEntries, s/HAL, s/Kernel - Add compressed ROM support.
        With the current scheme, a compressed ROM will have everything except the HAL and kernel compressed.
        During the keyboard scan period the kernel will allocate some temporary decompression workspace and call the decompression stub that was appended to the ROM.
        The decompression stub is expected to perform in-place decompression of the ROM. Once decompression is complete the workspace will be freed and the page tables updated to make the ROM image readonly.
        It's the HAL's responsibility to make sure any compressed ROM is located in an area of physically contiguous RAM large enough to hold the uncompressed image.
        More info here: http://www.riscosopen.org/wiki/documentation/show/Compressed%20ROMs
        Makefile, h/OSEntries - Add C export of hdr/OSEntries
        hdr/HALDevice - Add device ID for Tungsten video device. Convert tabs to spaces for consistency.
        hdr/HALEntries, s/NewReset - Moved KbdFlag_* definitions to hdr/HALEntries so HALs can use them in their keyboard scan code
        s/ArthurSWIs, S/HAL, s/HeapSort, s/Kernel, s/MemInfo, s/Middle, s/NewIRQs, s/TickEvents, s/vdu/vdugrafb - Make use of BLX, BFI and long multiplies if the CPU supports them. Don't support SWI calls from thumb mode if the CPU doesn't support thumb.
        s/HAL - Made the LDMIA in Init_MapInRAM more sensible (register order was backwards). The old code did work, but wasn't doing what the comments described. Removed unused/unfinished HAL_Write0 function. Improve RISCOS_LogToPhys to check L1PT for any section mappings if the logical_to_physical call fails
        s/ModHand - Save one instruction by using ADR instead of MOV+ADD to compute lr
        s/NewReset, s/PMF/key - Pass L1PT to HAL_Reset to allow machines without hardware reset (e.g. IOMD) to perform resets by manually disabling the MMU and restarting the ROM
        s/vdu/vdudriver, s/vdu/vdugrafv - Use GVEntry macro borrowed from NVidia module for setting up the GraphicsV jump table. Make GraphicsV_ReadPaletteEntry call HAL_Video_ReadPaletteEntry if left unclaimed. Fixup GV_Render to only call HAL_Video_Render if the HAL call is implemented.
        Tested with OMAP3, IOMD & Tungsten ROMs/softloads.
      Version 5.35, Tagged as 'Kernel-5_35-4_79_2_138'
  31. 27 Nov, 2011 1 commit
    • Robert Sprowson's avatar
      Rationalise some old switches. · 189b92c1
      Robert Sprowson authored
      Export less in hdr:RISCOS.
      Delete unused GetDecimalPair routine.
      Move CheckYear with other RTC stuff out of PMF/osword.
      Hide DebugROMInit and DebugROMErrors in release (even numbered) versions.
      Version 5.35, Tagged as 'Kernel-5_35-4_79_2_127'
  32. 24 Sep, 2011 1 commit
    • Jeffrey Lee's avatar
      Fix objasm 4 warnings · 6d052230
      Jeffrey Lee authored
        s/Arthur3, s/ChangeDyn, s/HAL, s/HeapMan, s/Middle, s/MoreSWIs, s/NewIRQs, s/Utility, s/VMSAv6, s/PMF/key, s/PMF/osbyte, s/PMF/osword, s/vdu/vdudecl, s/vdu/vdudriver, s/vdu/vduplot, s/vdu/vduwrch - Tweaked lots of LDM/STM instructions in order to get rid of the depracation/performance warnings
        Tested on rev A2 BB-xM
      Version 5.35, Tagged as 'Kernel-5_35-4_79_2_98_2_53'
  33. 08 Aug, 2011 1 commit
    • Jeffrey Lee's avatar
      Add zero page relocation support · 2247d8e9
      Jeffrey Lee authored
        A whole mass of changes to add high processor vectors + zero page relocation support to the Cortex branch of the kernel
        At the moment the code can only cope with two ZeroPage locations, &0 and &FFFF0000. But with a bit more tweaking those restrictions can probably be lifted, allowing ZeroPage to be hidden at almost any address (assuming it's fixed at compile time). If I've done my job right, these restrictions should all be enforced by asserts.
        There's a new option, HiProcVecs, in hdr/Options to control whether high processor vectors are used. When enabling it and building a ROM, remember:
        * FPEmulator needs to be built with the FPEAnchor=High option specified in the components file (not FPEAnchorType=High as my FPEmulator commit comments suggested)
        * ShareFS needs unplugging/removing since it can't cope with it yet
        * Iyonix users will need to use the latest ROOL boot sequence, to ensure the softloaded modules are compatible (OMAP, etc. don't really softload much so they're OK with older sequences)
        * However VProtect also needs patching to fix a nasty bug there - http://www.riscosopen.org/tracker/tickets/294
        The only other notable thing I can think of is that the ProcessTransfer code in s/ARM600 & s/VMSAv6 is disabled if high processor vectors are in use (it's fairly safe to say that code is obsolete in HAL builds anyway?)
        Fun challenge for my successor: Try setting ZeroPage to &FFFF00FF (or similar) so its value can be loaded with MVN instead of LDR. Then use positive/negative address offsets to access the contents.
        File changes:
        - hdr/ARMops - Modified ARMop macro to take the ZeroPage pointer as a parameter instead of 'zero'
        - hdr/Copro15ops - Corrected $quick handling in myISB macro
        - hdr/Options - Added ideal setting for us to use for HiProcVecs
        - s/AMBControl/allocate, s/AMBControl/growp, s/AMBControl/mapslot, s/AMBControl/memmap, s/AMBControl/service, s/AMBControl/shrinkp, s/Arthur2, s/Arthur3, s/ArthurSWIs, s/ChangeDyn, s/ExtraSWIs, s/HAL, s/HeapMan, s/Kernel, s/MemInfo, s/Middle, s/ModHand, s/MoreSWIs, s/MsgCode, s/NewIRQs, s/NewReset, s/Oscli, s/PMF/buffer, s/PMF/IIC, s/PMF/i2cutils, s/PMF/key, s/PMF/mouse, s/PMF/osbyte, s/PMF/oseven, s/PMF/osinit, s/PMF/osword, s/PMF/oswrch, s/SWINaming, s/Super1, s/SysComms, s/TickEvents, s/Utility, s/vdu/vdu23, s/vdu/vdudriver, s/vdu/vdugrafl, s/vdu/vdugrafv, s/vdu/vdupalxx, s/vdu/vdupointer, s/vdu/vduswis, s/vdu/vduwrch - Lots of updates to deal with zero page relocation
        - s/ARM600 - UseProcessTransfer option. Zero page relocation support. Deleted pre-HAL ClearPhysRAM code to tidy the file up a bit.
        - s/ARMops - Zero page relocation support. Set CPUFlag_HiProcVecs when high vectors are in use.
        - s/KbdResPC - Disable compilation of dead code
        - s/VMSAv6 - UseProcessTransfer option. Zero page relocation support.
        Tested with OMAP & Iyonix ROM softloads, both with high & low zero page.
        High zero page hasn't had extensive testing, but boot sequence + ROM apps seem to work.
      Version 5.35, Tagged as 'Kernel-5_35-4_79_2_98_2_48'
  34. 07 Aug, 2011 2 commits
    • Jeffrey Lee's avatar
      Add ESC_Status to list of OS_ReadSysInfo 6 items · 37162926
      Jeffrey Lee authored
        hdr/OSRSI6, s/Middle - Added ESC_Status to the list of items that OS_ReadSysInfo 6 exports
        Tested in ROM softload on Iyonix
      Version 5.35, Tagged as 'Kernel-5_35-4_79_2_121'
    • Jeffrey Lee's avatar
      Add ESC_Status to list of OS_ReadSysInfo 6 items · 26a09556
      Jeffrey Lee authored
        hdr/OSRSI6, s/Middle - Added ESC_Status to the list of items that OS_ReadSysInfo 6 exports
        Tested on rev A2 BB-xM
      Version 5.35, Tagged as 'Kernel-5_35-4_79_2_98_2_47'
  35. 04 Aug, 2011 1 commit
    • Jeffrey Lee's avatar
      Correct new OS_ReadSysInfo 6 item numbers · e4f162a3
      Jeffrey Lee authored
        s/Middle - Correct the actual item numbers to match those defined in the header 9and those used in the HAL branch)
        hdr/OSRSI6 - Corrected ROM version numbere where the new items are available from
      Version 5.35, Tagged as 'Kernel-5_35-4_79_2_98_2_45'
  36. 03 Aug, 2011 1 commit
    • Jeffrey Lee's avatar
      Add new OS_ReadSysInfo 6 items. Change naming of PublicWS values. · d2c62e16
      Jeffrey Lee authored
        s/Middle - Added some new OS_ReadSysInfo 6 items which are needed by the zero page relocation kernel. Also duplicated some existing entries to avoid conflicts with ROL's allocations.
        hdr/OSRSI6, Makefile - New header listing OS_ReadSysInfo 6 items
        hdr/PublicWS - Duplicated the workspace definitions for &0-&4000, but with a 'Legacy_' prefix to their names. Also added some new entries as needed by the zero page relocation kernel. Once existing modules have been updated to use OS_ReadSysInfo 6 & the Legacy_ definitions, the old defs will be removed.
        hdr/KernelWS - Removed 'Export_' prefix from all the exported workspace values, since the kernel can now use the original names directly
        hdr/Options - Dummy HiProcVecs option so merging things will be a bit cleaner
        Tested on rev A2 BB-xM
      Version 5.35, Tagged as 'Kernel-5_35-4_79_2_98_2_44'