1. 06 May, 2004 1 commit
    • Kevin Bracey's avatar
      * HAL can choose to limit amount of screen memory to allocate · 0f6941a8
      Kevin Bracey authored
        [Not fully implemented - for now leaves at least 16MB free if only
        one RAM area; was 1MB].
      * Added HAL_USBControllerInfo, HAL_MonitorLeadID and HAL_Video_Render.
      * Added HAL->OS call OS_IICOpV.
      * OS_MMUControl now allows independent control of I and C bits.
      * Added facility to deactivate keyboard debounce (magic word "NoKd" in
        R2 in KeyV 0).
      * Fixed problem with RAM amounts not a multiple of 4MB.
      * Supremacy bit (in VDU 19) now sets all 8 bits of supremacy.
      * Added PaletteV 14 (reads gamma tables).
      * Added Supremacy transfer functions (like gamma correction, but for
        supremacy). Allows easy global supremacy effects in a mode-independent
        fashion. Controlled with PaletteV 15,16.
      * Added modes 50-53 (320x240, 1,2,4,8bpp). Intended for small LCD.
      * Added 13.5kHz versions of TV modes (selected by Hdr:Machine).
      * Upped desktop version to 5.06.
      Version 5.35, Tagged as 'Kernel-5_35-4_79_2_66'
  2. 30 Nov, 2002 1 commit
    • Ben Avison's avatar
      Commit of kernel as featured in release 5.00. · 9664c93b
      Ben Avison authored
        Lots of changes since last version, at least the following:
        * Updated OS timestamp, removed alpha status
        * Negative INKEY OS version changed to &AA
        * GraphicsV is now alocated vector number &2A
        * ROM moved up to &FC000000
        * Max application slot increased to 512 Mbytes (for now)
        * Max size of RMA increased to 256 Mbytes
        * RMA is now first-created dynamic area (so it gets lowest address after
          top of application slot)
        * OS_Memory 10 reimplemeted
        * New OS_ReadSysInfo 6 values 18-22 added
        * OS_ReadSysInfo 8 gains flag bit to indicate soft power-off
        * Misc internal top-bit-set-address fixes
        * *ChangeDynamicArea can take sizes in megabytes or gigabytes
        * Magic word "&off" in R0 passed to OS_Reset powers down if possible
        * Added acceleration: block copy; CLS; text window scroll up; rectangle
        * Disabled LED flashing in page mode (liable to crash)
        * Masked sprite plot and VDU 5 text avoids reading the screen if possible
        * Framestore made USR mode accessible
        * Fix for VDU 5,127 bug - now relies on font definitions being in extreme
          quarters of memory, rather than bottom half
        * Allocated 64-bit OS_Convert... SWIs
        * IIC errors use allocated error numbers
        * Looks for Dallas RTC before Philips RTC because we're using a Philips
          NVRAM device with the same ID
        * Fix to bug that meant the oscillator in the Dallas RTC wasn't enabled
        * Default mouse type (USB) changed to allocated number
        * Ram disc max size increased to 128 Mbytes (Ursula merge) and made
          cacheable for StrongARMs (not XScale)
        * Branch through zero handler now works in USR mode, by use of a
          trampoline in the system stack to allow PC-relative register storage
        * Address exception handler changed to not use 0 as workspace
        * OS_Memory 13 extended to allow specification of cacheability and access
        * Added OS_Memory 16 to return important memory addresses
        * RISCOS_MapInIO() takes cacheable flag in bit 3, access permissions in
          bits 10 and 11, doubly-mapped flag in bit 20, and access permissions
          specified flag in bit 21
        * Bug fix in last version for application abort handlers didn't quite
          work; register shuffle required
        * "Module is not 32-bit compatible" error now reports the module name
        * Default configured language changed from 10 to 11 (now Desktop again)
      Version 5.35, Tagged as 'Kernel-5_35-4_79_2_51'
  3. 28 Oct, 2002 1 commit
    • Ben Avison's avatar
      In the No26bitCode case (ie when abort handlers are entered in ABT32 mode), if... · 982426fe
      Ben Avison authored
      In the No26bitCode case (ie when abort handlers are entered in ABT32 mode), if lazy task swapping was enabled and a data abort occurred that was not a page translation fault, then the code in AMB_LazyFixUp to map in the whole application slot was being circumvented, leading to problems for abort handlers in application space because r14_abt was corrupted by any abort due to accessing the abort handler itself. The test of the FSR (to compensate for the FAR being unusable for external aborts) which prompted the circumvention has therefore been moved inside AMB_LazyFixup.
      Also now preserves the FSR and FAR across AMB_LazyFixUp, so they are now
      visible from application abort handlers if desired.
      Version 5.35, Tagged as 'Kernel-5_35-4_79_2_50'
  4. 07 Oct, 2002 1 commit
  5. 11 Jun, 2001 1 commit
  6. 22 May, 2001 1 commit
    • Mike Stephens's avatar
      Reimplement Lazy task swapping, an amusing idea from Ursula, would have done... · bdc4f843
      Mike Stephens authored
      Reimplement Lazy task swapping, an amusing idea from Ursula, would have done it sooner but couldn't be bothered (humour).
      Currently activates for all ARMs flagged as base-restored
      abort model. No handling of eg. StrongARM pre-revT bug, but
      then the kernel no longer runs on StrongARM (progress).
      Still some details to fix: all aborts in current app space
      assumed to be missing pages, but this must be fixed to
      handle abort code in app space, things like debuggers
      marking code read only.
      Plus, small fixes:
        OS_Memory 8 returns vaguely useful info for RAM,VRAM
        in HAL build (temporary partial implementation)
        Broken handling of old BBC commands with (fx,tv etc)
        with no spaces fixed (fudgeulike code from Ursula,
        now 32-bit).
      Version 5.35, Tagged as 'Kernel-5_35-4_79_2_31'
  7. 13 Feb, 2001 1 commit
  8. 23 Jan, 2001 1 commit
    • Mike Stephens's avatar
      fix for IMB_range · 1e16da0c
      Mike Stephens authored
        (highlight level of testing that has taken place)
        (bugfix number if appropriate)
  9. 12 Jan, 2001 1 commit
    • Mike Stephens's avatar
      kernel now attempts to substitute video mode numbers in face of h/w with... · 6a293f53
      Mike Stephens authored
      kernel now attempts to substitute video mode numbers in face of h/w with limited bits-per-pixel support (not tested yet)
      HAL_API document added - early draft only, of interest to those
      writing or modifying HALs for new h/w
      ARMop_API document added - early draft only, of interest only
      to those modifying kernel to support new ARM cores
      *** polite comments on HAL_API welcome ***
      Version 5.35, Tagged as 'Kernel-5_35-4_79_2_15'
  10. 09 Jan, 2001 1 commit
  11. 10 Nov, 2000 1 commit
  12. 23 Oct, 2000 1 commit
  13. 20 Oct, 2000 1 commit
  14. 16 Oct, 2000 1 commit
  15. 09 Oct, 2000 1 commit
  16. 06 Oct, 2000 1 commit
  17. 05 Oct, 2000 3 commits
  18. 03 Oct, 2000 1 commit
  19. 02 Oct, 2000 1 commit
  20. 15 Sep, 2000 1 commit
    • Kevin Bracey's avatar
      * Converted to building with ObjAsm (but still a single object file using ORG). · 49836a59
      Kevin Bracey authored
      * Added ARM_IMB and ARM_IMBRange SWIs as recommended by ARMv5.
      * Some early prototype HAL bits popped in - a lot of source restructuring still
        to come.
      * New debug target creates an AIF image with debug information, and translates
        this into an ASCII object file for the 16702B logic analyser.
      Version 5.35, Tagged as 'Kernel-5_35-4_79_2_1'
  21. 13 Apr, 2000 1 commit
    • Kevin Bracey's avatar
      * Run-time emulator detection added (no need for separate images). Needs an · 36ba4cb5
      Kevin Bracey authored
        RPCEm update.
      * Register allocation in default ErrorV handler fixed - problems occured when
        callbacks were triggered on way out.
      * OS_Byte 19 didn't manipulate interrupt disable flag correctly in 26-bit
      * Stray bit of debugging left in sprite code many years ago removed.
      Version 5.23. Not tagged
  22. 04 Apr, 2000 1 commit
    • Kevin Bracey's avatar
      32-bit Kernel. · b4016e9c
      Kevin Bracey authored
        The Kernel will now compile to produce a pure 32-bit system if No26bitCode is
        set to TRUE.
        If No26bitCode is FALSE, then the Kernel will be a standard 26-bit Kernel,
        although some internal changes have taken place to minimise compile
        switches between the two cases. See Docs.32bit for more technical info.
        The hardest part was the flood-fill...
      Other changes:
        Pointer shape changes now take place on the next VSync, rather than actually
        WAITING for the VSync. Turning the Hourglass on shouldn't slow your machine
        down by 5% now :)
        Lots of really crusty pre-IOMD code removed.
        Tested in 32 and 26-bit forms in a limited desktop build. Basically, this
        will need to see a lot of use to iron out difficulties. I'd like anyone who
        has a non-frozen project to at least attempt using this Kernel.
      Version 5.23. Tagged as 'Kernel-5_23'
  23. 02 Feb, 2000 1 commit
    • Stewart Brodie's avatar
      Added OS_ReadSysInfo 6, 7 and 8 from Ursula branch. · b85d7d81
      Stewart Brodie authored
        Ensured that M_Phoebe builds set UtilityModule version to 4.00
        The softload utility relies on the existence of the extra reason codes
          to OS_ReadSysInfo introduced in Ursula.  The main kernel now supports
          these too (they are simply interfaces to read kernel capabilities and
          configuration - eg. addresses and sizes of UND and SVC mode stacks)
        Avoid OS_ReadSysInfo 9 - ROL have used it for reading the ROM personality
          information (and it's not in our kernel)
        Added some of the new macros into Copro15ops required by the ABT dump
          area code (returned by OS_ReadSysInfo 7) and added the code into ARM600
          to store abort information there.
        Required by softload utility for Ursula builds.
        Tested on Risc PC.
      Version 5.15. Tagged as 'Kernel-5_15'
  24. 29 Sep, 1999 1 commit
    • Kevin Bracey's avatar
      * Meaning of FEIOSpeedHalf was accidentally inverted. · fb297c9b
      Kevin Bracey authored
      * Wasn't allowing writes to most of EEPROM.
      * Old prototype OS_SetTime SWI code removed.
      * MPEGPoduleNTSCNotPALMask option support removed to simplify things a bit.
      * Now can cope with a system with a PAL/NTSC link, but no monitor detect line.
      * Default PAL & NTSC modes now always 12 & 46 respectively.
      * Kernel now knows about monitor type 8 (NTSC) - modes 44-46 (640x200) are
      * STB/NC CMOS test removed from POST pending further investigation.
      Version 4.90. Tagged as 'Kernel-4_90'
  25. 23 Sep, 1999 1 commit
  26. 03 Aug, 1999 1 commit
    • Kevin Bracey's avatar
      * Added support for 24LC64 8K EEPROM (untested). · f52b4580
      Kevin Bracey authored
      * Integrated Ursula fast service call dispatch code.
      * Added Interruptible32bitModes from Ursula.
      * Stopped allowing ROM modules (other than the Kernel/UtilityModule) to write
        to the hardware vectors in 26-bit mode.
      Version 4.81. Tagged as 'Kernel-4_81'
  27. 30 Apr, 1999 1 commit
  28. 09 Feb, 1999 1 commit
    • Neil Turton's avatar
      ROM speed not taken from the Machine header file. POST can now exist in a... · 417410eb
      Neil Turton authored
      ROM speed not taken from the Machine header file.  POST can now exist in a softloaded OS, since it searches for a zero word in the ROM instead of using one within the POST when trying to communicate with the POST adapter (the zero word must be in ROM).  Fixed to build on non-chrontel STB/NC products.  Lots of duplicate code merged in
      MemSize.  MemSize copes better with the softload case, and is less
      willing to use the region the OS occupies as video memory, or
      page tables.  POST is now ON (memory tests disabled).
      OS_ReadSysInfo 4 now uses the NVRAM module to access the ethernet
      address in NVRAM/CMOS, so that the availability/location of the
      MAC address can be changed.  CMOS location 0 is now unprotected on
      STB/NC products to try to stop people poking the hardware directly.
      Fixed a CMOS resetting problem on STBs where the value expected in a
      location was different from the value written on a CMOS reset, so the
      CMOS would be reset every time...
      Version 4.69. Tagged as 'Kernel-4_69'
  29. 30 Sep, 1998 1 commit
    • Kevin Bracey's avatar
      Spinner branch merged. · 5ba3f5db
      Kevin Bracey authored
      Bandwidth limit for 7500FE fixed.
      RO371Timings flag set to :LNOT:STB
      Version 4.64. Tagged as 'Kernel-4_64'
  30. 07 May, 1997 1 commit
  31. 01 May, 1997 1 commit
  32. 21 Jan, 1997 1 commit
  33. 21 Nov, 1996 1 commit
  34. 06 Nov, 1996 1 commit
  35. 05 Nov, 1996 1 commit