Commit fa2003c1 authored by Jeffrey Lee's avatar Jeffrey Lee
Browse files

Disable ProcessTransfer code indefinitely

Detail:
  s/ARM600, s/VMSAv6 - Disable ProcessTransfer code for all kernel configurations.
  For VMSAv6 it was definitely broken (needs to be taught about VMSAv6 page tables and ARMv6+ unaligned loads).
  For ARM600 it seems to work OK, but is of no real use as (a) we're always running in 32bit mode and so don't need to worry about processor vector writes and (b) OS_AbortTrap isn't implemented so there's no way for anyone to register an abort handling routine.
  Code is being kept around instead of deleting it straight away just in case there are some hidden knock-ons to disabling it, or we decide to implement our own OS_AbortTrap some day.
Admin:
  Tested on Iyonix, BB-xM


Version 5.35, 4.79.2.223. Tagged as 'Kernel-5_35-4_79_2_223'
parent 03d3b37a
...@@ -13,11 +13,11 @@ ...@@ -13,11 +13,11 @@
GBLS Module_ComponentPath GBLS Module_ComponentPath
Module_MajorVersion SETS "5.35" Module_MajorVersion SETS "5.35"
Module_Version SETA 535 Module_Version SETA 535
Module_MinorVersion SETS "4.79.2.222" Module_MinorVersion SETS "4.79.2.223"
Module_Date SETS "20 Apr 2014" Module_Date SETS "20 Apr 2014"
Module_ApplicationDate SETS "20-Apr-14" Module_ApplicationDate SETS "20-Apr-14"
Module_ComponentName SETS "Kernel" Module_ComponentName SETS "Kernel"
Module_ComponentPath SETS "castle/RiscOS/Sources/Kernel" Module_ComponentPath SETS "castle/RiscOS/Sources/Kernel"
Module_FullVersion SETS "5.35 (4.79.2.222)" Module_FullVersion SETS "5.35 (4.79.2.223)"
Module_HelpVersion SETS "5.35 (20 Apr 2014) 4.79.2.222" Module_HelpVersion SETS "5.35 (20 Apr 2014) 4.79.2.223"
END END
...@@ -5,12 +5,12 @@ ...@@ -5,12 +5,12 @@
* *
*/ */
#define Module_MajorVersion_CMHG 5.35 #define Module_MajorVersion_CMHG 5.35
#define Module_MinorVersion_CMHG 4.79.2.222 #define Module_MinorVersion_CMHG 4.79.2.223
#define Module_Date_CMHG 20 Apr 2014 #define Module_Date_CMHG 20 Apr 2014
#define Module_MajorVersion "5.35" #define Module_MajorVersion "5.35"
#define Module_Version 535 #define Module_Version 535
#define Module_MinorVersion "4.79.2.222" #define Module_MinorVersion "4.79.2.223"
#define Module_Date "20 Apr 2014" #define Module_Date "20 Apr 2014"
#define Module_ApplicationDate "20-Apr-14" #define Module_ApplicationDate "20-Apr-14"
...@@ -18,6 +18,6 @@ ...@@ -18,6 +18,6 @@
#define Module_ComponentName "Kernel" #define Module_ComponentName "Kernel"
#define Module_ComponentPath "castle/RiscOS/Sources/Kernel" #define Module_ComponentPath "castle/RiscOS/Sources/Kernel"
#define Module_FullVersion "5.35 (4.79.2.222)" #define Module_FullVersion "5.35 (4.79.2.223)"
#define Module_HelpVersion "5.35 (20 Apr 2014) 4.79.2.222" #define Module_HelpVersion "5.35 (20 Apr 2014) 4.79.2.223"
#define Module_LibraryVersionInfo "5:35" #define Module_LibraryVersionInfo "5:35"
...@@ -17,8 +17,14 @@ ...@@ -17,8 +17,14 @@
GBLL DebugAborts GBLL DebugAborts
DebugAborts SETL {FALSE} DebugAborts SETL {FALSE}
; Disable ProcessTransfer code pending execution.
; If we want to reuse the code at some point in the future, be aware that it
; needs the following work performing:
; * Updating to cope with HiProcVecs (or special zero page handling removed)
; * (preferablly) add support for all the 'new' load/store instructions.
; LDRH/STRH, LDRD/STRD, coprocessor transfers, etc.
GBLL UseProcessTransfer GBLL UseProcessTransfer
UseProcessTransfer SETL :LNOT: HiProcVecs ; Needs updating to cope with HiProcVecs (for proc. vector protection) UseProcessTransfer SETL {FALSE}
; MMU interface file - ARM600 version ; MMU interface file - ARM600 version
......
...@@ -17,8 +17,19 @@ ...@@ -17,8 +17,19 @@
GBLL DebugAborts GBLL DebugAborts
DebugAborts SETL {FALSE} DebugAborts SETL {FALSE}
; Disable ProcessTransfer code pending execution.
; If we want to reuse the code at some point in the future, be aware that it
; needs the following work performing:
; * Updating to cope with HiProcVecs (or special zero page handling removed)
; * (preferablly) add support for all the 'new' load/store instructions.
; LDRH/STRH, LDRD/STRD, LDREX/STREX, coprocessor transfers, etc.
; * Needs to be made aware of VMSAv6/7 page table format - currently uses old
; ARM600 code
; * Needs to be aware of ARMv6+ unaligned load behaviour, and any other quirks
; where genuine aborts may in turn cause ProcessTransfer to inadvertantly
; cause an abort itself (e.g. unaligned LDM/STM)
GBLL UseProcessTransfer GBLL UseProcessTransfer
UseProcessTransfer SETL :LNOT: HiProcVecs ; Needs updating to cope with HiProcVecs (for proc. vector protection) UseProcessTransfer SETL {FALSE}
; MMU interface file - VMSAv6 version ; MMU interface file - VMSAv6 version
......
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