Remove some obsolete definitions for clarity

 * MinAplWork isn't used.
 * SuperMode isn't used and is less well known than "SWI OS_EnterOS".
 * MEMCADR is now only a magic value returned by OS_UpdateMEMC,
   so it is clearer to include it literally with comment.

Added a comment to explain the baffling combination of
the MEMC1 control register's address with it's value.


Version 6.27. Not tagged

VersionASM

@@ -12,9 +12,9 @@
 Module_MajorVersion     SETS    "6.27"
 Module_Version          SETA    627
 Module_MinorVersion     SETS    ""
-Module_Date             SETS    "09 Nov 2019"
-Module_ApplicationDate  SETS    "09-Nov-19"
+Module_Date             SETS    "19 Nov 2019"
+Module_ApplicationDate  SETS    "19-Nov-19"
 Module_ComponentName    SETS    "Kernel"
 Module_FullVersion      SETS    "6.27"
-Module_HelpVersion      SETS    "6.27 (09 Nov 2019)"
+Module_HelpVersion      SETS    "6.27 (19 Nov 2019)"
                         END

VersionNum

@@ -5,17 +5,17 @@
  */
 #define Module_MajorVersion_CMHG        6.27
 #define Module_MinorVersion_CMHG        
-#define Module_Date_CMHG                09 Nov 2019
+#define Module_Date_CMHG                19 Nov 2019
 
 #define Module_MajorVersion             "6.27"
 #define Module_Version                  627
 #define Module_MinorVersion             ""
-#define Module_Date                     "09 Nov 2019"
+#define Module_Date                     "19 Nov 2019"
 
-#define Module_ApplicationDate          "09-Nov-19"
+#define Module_ApplicationDate          "19-Nov-19"
 
 #define Module_ComponentName            "Kernel"
 
 #define Module_FullVersion              "6.27"
-#define Module_HelpVersion              "6.27 (09 Nov 2019)"
+#define Module_HelpVersion              "6.27 (19 Nov 2019)"
 #define Module_LibraryVersionInfo       "6:27"

s/ExtraSWIs

@@ -85,9 +85,16 @@ SSETMEMC ROUT
         LDR     r0, [r12, #MEMC_CR_SoftCopy] ; return old value
         BIC     r11, r0, r1
         ORR     r11, r11, R10
+
+        ; Force the top 12 bits to &036, on Archimedes hardware this would
+        ; be the base address of the MEMC1 control register, with the value
+        ; of the register occupying the bottom 20 bits, as the MEMC1 was not
+        ; connected to the data bus. Keep doing so for compatibility with
+        ; old programs.
         BIC     r11, r11, #&FF000000
         BIC     r11, r11, #&00F00000
-        ORR     r11, r11, #MEMCADR
+        ORR     r11, r11, #&03600000
+
         STR     r11, [r12, #MEMC_CR_SoftCopy]
 
 ; mjs Oct 2000 kernel/HAL split

s/Kernel

@@ -251,11 +251,8 @@ v8      RN      11
 PageSize          * (4*1024)       ;MMU page size (normal pages)
 Log2PageSize      * 12             ;for shifts
 
-MinAplWork * 40*1024         ; minimum size of AplWork
-
 ; Fixed addresses
 
-MEMCADR  * &03600000
         GBLL    ROMatTop
 ROM      * &FC000000
 ROMatTop SETL {TRUE}

s/vdu/vdudecl

@@ -299,14 +299,6 @@ GVDriverState_Started       *   1:SHL:0  ; ScreenMode_StartDriver called
         LDR$cond PC, [StkPtr], #4
         MEND
 
-;
-; Macro SuperMode - Set supervisor mode
-;
-        MACRO
-        SuperMode
-        SWI &16
-        MEND
-
 ;
 ; Macro WINDow - Compare coordinate against graphics window
 ;