Add new ARMops. Add macros which map the ARMv7/v8 cache/TLB maintenance...
Add new ARMops. Add macros which map the ARMv7/v8 cache/TLB maintenance mnemonics (as featured in recent ARM ARMs) to MCR ops. Detail: - Docs/HAL/ARMop_API - Document the new ARMops. These ops are intended to help with future work (DMA without OS_Memory 0 "make temp uncacheable", and minimising cache maintenance when unmapping pages) and aren't in use just yet. - hdr/Copro15ops - Add new macros for ARMv7+ which map the mnemonics seen in recent ARM ARMs to the corresponding MCR ops. This should make things easier when cross-referencing docs and reduce the risk of typos. - hdr/KernelWS - Shuffle kernel workspace a bit to make room for the new ARMops - hdr/OSMisc - Expose new ARMops via OS_MMUControl 2 - s/ARMops - Implement the new ARMops. Change the ARMv7+ ARMops to use the new mnemonic macros. Also get rid of myDSB / myISB usage from ARMv7+ code paths; use DSB/ISB/etc. directly to ensure correct behaviour - s/HAL - Mnemonic + ISB/DSB updates. Change software RAM clear to do 16 bytes at a time for kernel workspace instead of 32 to allow the kernel workspace tweaks to work. Admin: Binary diff shows that mnemonics map to the original MCR ops correctly Note: Raspberry Pi builds will now emit lots of warnings due to increased DSB/ISB instruction use. However it should be safe to ignore these as they should only be present in v7+ code paths. Note: New ARMops haven't been tested yet, will be disabled (or at least hidden from user code) in a future checkin Version 5.68. Tagged as 'Kernel-5_68'
Showing with 793 additions and 185 deletions