• Jeffrey Lee's avatar
    Fix ARMv7 MVA-based cache/TLB op abort handler to be re-entrant · 9aa05feb
    Jeffrey Lee authored
    Detail:
      s/VMSAv6 - The code in DAbPreVeneer that checks for aborting MVA-based cache/TLB ops is now re-entrant.
      This is to cope with the "strange but true" case where a data abort was being triggered by a load/store
      instruction that itself was in an unmapped page.
    Admin:
      Tested on rev C2 beagleboard. Fixes issue with StrongED crashing on load (see http://www.riscosopen.org/forum/forums/5/topics/453)
      Still need to work out why CPU was able to execute code from the unmapped page without triggering a prefetch abort (stale cache entries?)
    
    
    Version 5.35, 4.79.2.98.2.31. Tagged as 'Kernel-5_35-4_79_2_98_2_31'
    9aa05feb
VersionASM 1.03 KB