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; Copyright 1996 Acorn Computers Ltd
;
; Licensed under the Apache License, Version 2.0 (the "License");
; you may not use this file except in compliance with the License.
; You may obtain a copy of the License at
;
;     http://www.apache.org/licenses/LICENSE-2.0
;
; Unless required by applicable law or agreed to in writing, software
; distributed under the License is distributed on an "AS IS" BASIS,
; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
; See the License for the specific language governing permissions and
; limitations under the License.
;
        TTL     => Middle

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; Compatibility fudgery for OS_ReadLine and ReadLineV with 32-bit addresses

ReadLineSWI
        Push    "r4,lr"
        MOV     r4, #0
        SWI     XOS_ReadLine32
        Pull    "r4,lr"
        ; Pass back NZCV bits
        MRS     r11, CPSR
26
      [ NoARMT2
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        BIC     lr,  lr,  #N_bit+Z_bit+C_bit+V_bit
        AND     r11, r11, #N_bit+Z_bit+C_bit+V_bit
        ORR     lr, lr, r11
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      |
        ASSERT (N_bit+Z_bit+C_bit+V_bit)=&F0000000
        MOV     r11, r11, LSR #28
        BFI     lr, r11, #28, #4
      ]
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        B       SLVK

ReadLine32SWI
        MOV     r11, #OS_ReadLine
        B       VecSwiDespatch

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; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
; VecRdLine - Read line from input stream (OSWORD 0 equivalent)

; In    r0 -> buffer for characters
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;       r1 =  max length of line (excluding carriage return)
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;       r2 = lowest character put into buffer
;       r3 = highest character put into buffer
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;       r4 = flags
;               bit 31 set means don't reflect characters that don't go in the buffer
;               bit 30 set means reflect with the character in R4
;               bits 7-0 = character to echo if r4 bit 30 is set
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;       wp -> OsbyteVars

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; Out   r0, r2, r3 corrupted
;       r1 = length of line (excluding carriage return)
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;       C=0 => line terminated by return (CR or LF)
;       C=1 => line terminated by ESCAPE

; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

VecRdLine ROUT

        Push    "R4-R7"
64

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        MOV     R7, R4                  ; R7 = flags + echo byte
        MOV     R4, R0                  ; R4 -> buffer
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        MOV     R6, #0                  ; R6 = index into buffer
        STRB    R6, PageModeLineCount   ; reset page lines

        B       %FT10
        LTORG

05
        SWI     XOS_WriteC
        BVS     ReadLine_Vset
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        SWI     XOS_ReadC
        BVS     ReadLine_Vset
        BCS     %FT70                   ; ESCAPE

        LDRB    R5, WrchDest            ; does output include VDU ?
        TST     R5, #2
        BNE     %FT30                   ; no, then still buffer

        LDRB    R5, VDUqueueItems       ; is VDU queueing ?
        TEQ     R5, #0
        BNE     %BT05                   ; yes, then just print

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        TEQ     R0, #127                ; is it DELETE ?
        TEQNE   R0, #8                  ; or backspace?
        BNE     %FT40                   ; no, then skip

        TEQ     R6, #0                  ; yes, then have we any chars ?
        BEQ     %BT10                   ; no, then loop
        SUB     R6, R6, #1              ; go back 1 char
        MOV     R0, #127
        B       %BT05                   ; print DEL and loop

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        TEQ     R0, #21                 ; is it CTRL-U ?
        BNE     %FT50                   ; no, then skip

        TEQ     R6, #0                  ; yes, then have we any chars ?
        BEQ     %BT10                   ; no, then loop

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        SWI     XOS_WriteI+127          ; print DELs to start of line
        BVS     ReadLine_Vset
        SUBS    R6, R6, #1
        BNE     %BT45
        B       %BT10                   ; then loop

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        TEQ     R0, #13                 ; is it CR ?
        TEQNE   R0, #10                 ; or LF ?
        MOVEQ   r0, #13                 ; always store CR if so
        STRB    R0, [R4, R6]            ; store byte in buffer
        BEQ     %FT60                   ; Exit if either

        CMP     R6, R1                  ; is buffer full ?
        MOVCS   R0, #7                  ; if so, beep and loop
        BCS     %BT05

        CMP     R0, R2                  ; is char >= min ?
        CMPCS   R3, R0                  ; and char <= max ?
        ADDCS   R6, R6, #1              ; if so, then inc pointer
        BCS     %FT80
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        TST     R7, #&80000000          ; no reflection
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        BNE     %BT10                   ; of non-entered chars
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80      TST     R7, #&40000000
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        ANDNE   R0, R7, #&FF            ; echo char -> R0

        B       %BT05                   ; echo character

60      SWI     XOS_NewLine
        BVS     ReadLine_Vset

; insert code here to call NetVec with R0 = &0D

70
        CLRV
EndReadLine
        MOVVC   R0, R4                  ; restore R0
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        LDR     R5, =ZeroPage
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        LDRB    R5, [R5, #ESC_Status]
        MOVS    R5, R5, LSL #(32-6)     ; shift esc bit into carry

        MOV     R1, R6                  ; R1 := length
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        Pull    "R4-R7, pc"             ; Always claiming vector
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ReadLine_Vset
        SETV
        B       EndReadLine

; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
; SWI OS_Control (deprecated): set handlers

SCTRL   Push    "R0-R3, lr"

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        WritePSRc SVC_mode+I_bit, R0    ; need IRQs off to get consistent state
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        MOV     R0, #EventHandler
        MOV     R1, R3
        BL      CallCESWI
        STR     R1, [stack, #3*4]

        MOV     R0, #EscapeHandler
        LDR     R1, [stack, #2*4]
        BL      CallCESWI
        STR     R1, [stack, #2*4]

        MOV     R0, #ErrorHandler
        Pull    "R1, R3"
        BL      CallCESWI
        MOV     R0, R1
        MOV     R1, R3

        Pull    "R2, R3, lr"
        ExitSWIHandler


CallCESWI
        Push    lr
        MOV     r2, #0                  ; readonly
        SWI     XOS_ChangeEnvironment
        Pull    pc

; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
; SWI OS_SetEnv (deprecated): Environment setting

SSTENV  Push    "R0, R1, lr"
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        WritePSRc SVC_mode+I_bit, R0    ; no irqs - want consistent set.
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        MOV     R0, #AddressExceptionHandler
        MOV     R1, R7
        SWI     XOS_ChangeEnvironment
        MOV     R7, R1

        MOV     R0, #DataAbortHandler
        MOV     R1, R6
        SWI     XOS_ChangeEnvironment
        MOV     R6, R1

        MOV     R0, #PrefetchAbortHandler
        MOV     R1, R5
        SWI     XOS_ChangeEnvironment
        MOV     R5, R1

        MOV     R0, #UndefinedHandler
        MOV     R1, R4
        SWI     XOS_ChangeEnvironment
        MOV     R4, R1

        MOV     R0, #MemoryLimit
        LDR     R1, [stack, #4]
        SWI     XOS_ChangeEnvironment
        STR     R1, [stack, #4]

        MOV     R0, #ExitHandler
        Pull    "R1"
        BL      CallCESWI
        Push    "R1"

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        LDR     R12, =ZeroPage
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        LDR     R2, [R12, #RAMLIMIT]    ; this is read-only
        MOV     R3, #0                  ; never any Brazil-type buffering
                                        ; m2 tools will complain if there is!
        Pull    "R0, R1, lr"
        ExitSWIHandler

; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
; Change user state SWIs
; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

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SINTON  BIC     lr, lr, #I32_bit
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        ExitSWIHandler

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SINTOFF ORR     lr, lr, #I32_bit
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        ExitSWIHandler

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SENTERSWI
        TST   lr, #2_11100
        ORREQ lr, lr, #SVC26_mode       ; 26-bit modes -> SVC26
        BICNE lr, lr, #2_11111
        ORRNE lr, lr, #SVC32_mode       ; others -> SVC32
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        ExitSWIHandler

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SLEAVESWI
        BIC   lr, lr, #2_01111
        ExitSWIHandler

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; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
; SWI OS_BreakPt: user breakpoint - unsuitable for debugging SVC mode code!

SBRKPT ROUT

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        ADD     sp, sp, #4              ; discard stacked SWI number
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        LDR     r10, =ZeroPage
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        LDR     r10, [r10, #BrkBf]
        STR     r12, [r10, #16*4]       ; original PSR (with V)
        Pull    r14
        TST     r12, #T32_bit
        SUBEQ   r14, r14, #4
        SUBNE   r14, r14, #2            ; r14 = PC of the SWI
        TST     r12, #2_01111
        STR     r14, [r10, #15*4]       ; PC of the SWI put in.
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        BNE     %FT01                   ; NE if not in user mode
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        STR     r0, [r10], #4
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        MOV     r0, r10
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        LDMFD   sp, {r10-r12}
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  [ SASTMhatbroken
        STMIA   r0!,{r1-r12}
        STMIA   r0, {r13_usr,r14_usr}^ ; user mode case done.
        SUB     r0, r0, #12*4
  |
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        STMIA   r0, {r1-r12, r13_usr, r14_usr}^ ; user mode case done.
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        NOP
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  ]
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10      LDR     stack, =SVCSTK
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        LDR     r12, =ZeroPage+BrkAd_ws
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        LDMIA   r12, {r12, pc}          ; call breakpoint handler

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; Non-user mode case
01      AND     r11, r12, #2_01111      ; SVC26/SVC32 mode?
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        TEQ     r11, #SVC_mode
        BEQ     %FT02                   ; [yes]
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; Non-user, non-supervisor - must be IRQ, ABT, UND or SYS (no SWIs from FIQ)
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        STR     r0, [r10], #4
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        MOV     r0, r10
        BIC     r14, r12, #T32_bit      ; don't go into Thumb mode
        LDMFD   sp, {r10-r12}           ; Not banked
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        MSR     CPSR_c, R14             ; get at registers r13 and r14
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        STMIA   r0, {r1-r12}
        STR     sp, [r0, #12*4]
        STR     r14, [r0, #13*4]
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        WritePSRc SVC_mode, r12
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        B       %BT10

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; Supervisor mode case
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02      MOV     r14, r10                ; supervisor mode. R14 in buffer dead
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        LDMFD   sp!, {r10-r12}
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        STMIA   r14, {r0-r12}
        STR     r13, [r14, #13*4]
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        LDR     r12, =&DEADDEAD
        STR     r12, [r14, #14*4]       ; mark R14 as dead
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        B       %BT10

; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
; SWI OS_UnusedSWI (deprecated): Set the unused SWI handler

SUNUSED Push    "R1, lr"
        MOV     R1, R0
        MOV     R0, #UnusedSWIHandler
        SWI     XOS_ChangeEnvironment
        MOV     R0, R1
        Pull    "R1, lr"
        ExitSWIHandler

; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
; SWI OS_SetCallBack: Set callback flag

SSETCALL ROUT

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        MSR     CPSR_c, #I32_bit + SVC32_mode
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        LDR     r10, =ZeroPage
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        LDRB    r11, [r10, #CallBack_Flag]
        ORR     r11, r11, #CBack_OldStyle
        STRB    r11, [r10, #CallBack_Flag]
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        ADD     sp, sp, #4              ; Skip saved R11
        B       back_to_user_irqs_already_off
                                        ; Do NOT exit via normal mechanism
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; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
; SWI read mouse information
; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

VecMouse
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     WritePSRc SVC_mode+I_bit, R10
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     MOV   R10, #MouseV
     Push "lr"
     BL    CallVector
     Pull "lr"
     ExitSWIHandler

; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
; SWI OS_SerialOp when not in kernel
; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

SerialOp ROUT
        MOV     r10, #SerialV
        Push    lr
        BL      CallVector
        Pull    lr
        BICCC   lr, lr, #C_bit
        ORRCS   lr, lr, #C_bit
        B       SLVK_TestV

; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
; Supervisor routines to set default handlers
; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

; Reset Error and Escape handlers

DEFHAN LDR  R1, =GeneralMOSBuffer         ; decent length error buffer
       ADR  R0, ERRORH
       ADR  R2, ESCAPH
       MOV  R3, #0
       MOV  R4, R14
       SWI  XOS_Control

       MOV  r0, #UpCallHandler
       ADR  r1, DefUpcallHandler
       MOV  r2, #0
       SWI  XOS_ChangeEnvironment

       MOV  PC, R4

; Reset Exception, Event, BreakPoint, UnusedSWI, Exit and CallBack handlers

DEFHN2 MOV  R12, R14
       MOV  R0, #0
       MOV  R1, #0
       MOV  R2, #0
       ADR  R3, EVENTH
       SWI  XOS_Control
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       LDR  R0, =ZeroPage+DUMPER
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       ADR  R1, NOCALL
       SWI  XOS_CallBack
       ADRL R0, CLIEXIT
       MOV  R1, #0
       MOV  R2, #0
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       ADRL R4, UNDEF
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       ADRL R5, ABORTP
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       ADRL R6, ABORTD
       ADRL R7, ADDREX
       SWI  XOS_SetEnv
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       LDR  R0, =ZeroPage+DUMPER
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       ADR  R1, DEFBRK
       SWI  XOS_BreakCtrl
       ADRL R0, NoHighSWIHandler
       SWI  XOS_UnusedSWI
       MOV  PC, R12

; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
; system handlers
; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

DefUpcallHandler
ESCAPH
EVENTH  MOV     pc, lr


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NOCALL  LDR     r0, =ZeroPage               ; default callback routine
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        LDR     r14, [r0, #CallBf]
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        LDR     r0, [r14, #4*16]
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        MSR     SPSR_cxsf, r0
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        LDMIA   r14, {r0-r12, r13_usr, r14_usr}^ ; load user's regs
        NOP
        LDR     r14, [r14, #4*15]
        MOVS    pc, r14


ERRORH ROUT

      [ International
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        SWI     XOS_EnterOS

        LDR     R0,=ZeroPage+KernelMessagesBlock+4
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        ADR     R1,ErrorToken
        MOV     R2,#0
        SWI     XMessageTrans_Lookup
        MOVVC   R12,R2
        ADRVS   R12,ErrorText

01
        LDRB    R0,[R12],#1
        CMP     R0,#32
        BLT     %FT99
        CMP     R0,#"%"
        SWINE   XOS_WriteC
        BVS     %FT99
        BNE     %BT01

        LDRB    R0,[R12],#1              ; Found a %
        CMP     R0,#32
        BLT     %FT99

        CMP     R0,#"0"
        LDREQ   R0,=GeneralMOSBuffer+8
        BEQ     %FT10
        CMP     R0,#"1"
        BNE     %BT01

        LDR     R3,=GeneralMOSBuffer+4
        LDR     R0,[R3]
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        LDR     R1,=ZeroPage+MOSConvertBuffer
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        MOV     R2,#12
        SWI     XOS_ConvertHex8

02
        LDRB    R1, [R0], #1
        CMP     R1, #"0"
        BEQ     %BT02
        CMP     R1, #0
        SUBEQ   R0, R0, #1
        SUB     R0, R0, #1

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        SWI     XOS_Write0
        BVC     %BT01

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        SWI     XOS_NewLine

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        LDR     R0, =ZeroPage
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        STRB    R0, [R0, #ErrorSemaphore]                 ; Enable error translation, in case we got here in the
                                                        ; middle of looking up an error

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        B       GOSUPV                          ; switches back to User mode for us
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ErrorToken      =       "Error:"
ErrorText       =       "Error: %0 (Error Number &%1)",0
        ALIGN
      |

        SWI     OS_WriteS
        =       10,13,"Error:",10,13, 0
        ALIGN
        LDR     r0, =GeneralMOSBuffer+4
        BL      PrintError
        B       GOSUPV
      ]


DEFBRK
      [ International
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        WritePSRc 0, lr
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        MOV     r0, r0
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        LDR     r13, =ZeroPage
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        LDR     r13, [r13, #BrkBf]
        LDR     r0, [r13, #15*4]
        LDR     r1, =GeneralMOSBuffer
        MOV     r2, #?GeneralMOSBuffer
        SWI     OS_ConvertHex8

; r0 -> address

        MOV     R4,R0
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        LDR     R0,=ZeroPage+KernelMessagesBlock+4
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        ADR     R1,BreakToken
        LDR     R2,=GeneralMOSBuffer+16
        MOV     R3,#256-16
        SWI     XMessageTrans_Lookup
        MOVVC   R0,R2
        ADRVS   R0,BreakText
        SWI     OS_Write0
        SWI     OS_NewLine

      |
        SWI     OS_WriteS
        = "Stopped at break point at &", 0
        ALIGN
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        WritePSRc 0, lr
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        MOV     r0, r0
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        LDR     r13, =ZeroPage
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        LDR     r13, [r13, #BrkBf]
        LDR     r0, [r13, #15*4]
        LDR     r1, =GeneralMOSBuffer
        MOV     r2, #?GeneralMOSBuffer
        SWI     OS_ConvertHex8
        SWI     OS_Write0
        SWI     OS_NewLine
      ]

Quit_Code
        SWI     OS_Exit

      [ International

BreakToken      =       "BreakPt:"
BreakText       =       "Stopped at break point at &%0",0
        ALIGN

      ]

PrintError
        MOV    R12, R14
        LDR    R10, [R0], #4
        SWI    XOS_Write0
        BVS    %FT02
      [ :LNOT: International
        SWI    XOS_WriteS
        =     " (Error number &", 0
        BVS    %FT02
      ]
        LDR    R1,=GeneralMOSBuffer
        MOV    R2, #&E0
        MOV    R0, R10
        SWI    XOS_ConvertHex8       ; can't fail!
01      LDRB   R1, [R0], #1
        CMP    R1, #"0"
        BEQ    %BT01
        CMP    R1, #0
        SUBEQ  R0, R0, #1
      [ International                   ; We might not have any stack so ..
        SUB    R11,R0, #1               ; R11 -> Error number
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        LDR    R0, =ZeroPage+KernelMessagesBlock+4
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        ADR    R1, PrintErrorString
        MOV    R2,#0                    ; Don't copy message
        SWI    XMessageTrans_Lookup
        ADRVS  R2,PrintErrorString+4    ; If no MessageTrans point at english text.
11
        LDRB   R0,[R2],#1
        CMP    R0,#32
        BLT    %FT13
        CMP    R0,#"%"
        SWINE  XOS_WriteC
        BVS    %FT13
        BNE    %BT11

        LDRB    R0,[R2],#1
        CMP     R0,#32
        BLT     %FT13                   ; Just in case the % is the last character !

        CMP     R0,#"0"                 ; We only know about %0
        BNE     %BT11

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        LDRB    R0,[R11],#1              ; Print error number.
        CMP     R0,#32
        BLT     %BT11
        SWI     XOS_WriteC
        BVC     %BT12

13
      |
        SUB    R0, R0, #1
        SWI    XOS_Write0
        SWIVC  XOS_WriteI+")"
      ]
        SWIVC  XOS_NewLine
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02      MOV    PC, R12
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      [ International
PrintErrorString
        =     "Err: (Error number &%0)", 0
        ALIGN
      ]

        LTORG

; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
; Exception handling

DumpyTheRegisters  ROUT
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; R0 points at r8 in register dump. r0-r7, PC, PSR saved
; R1 is PSR
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; R4 is offset from saved PC for error message
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; R14 points at error block
; In ABT32 or UND32
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        MOV     R7, R14                 ; put error address into unbanked register
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        TST     R1, #&0F
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  [ SASTMhatbroken
        STMEQIA R0!,{R8-R12}
        STMEQIA R0, {R13,R14}^        ; user mode case done.
        SUBEQ   R0, R0, #5*4
  |
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        STMEQIA R0, {R8-R14}^         ; user mode case done.
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  ]
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        BEQ     UNDEF2

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        MRS     R3, CPSR
        AND     R3, R3, #&0F

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        ORR     R2, R1, #I32_bit :OR: F32_bit
        BIC     R2, R2, #T32_bit
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        MSR     CPSR_c, R2              ; change into original mode
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        STMIA   R0, {R8-R12}            ; save the banked registers
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        AND     R2, R1, #&0F
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        CMP     R2, R3                  ; did abort come from our abort-handling mode?
        MOV     R3, SP
        ADDEQ   R3, R3, #17*4           ; adjust stored SP if so
        LDREQ   R14, =&DEADDEAD         ; and mark R14 as corrupt
        STR     R3, [R0, #5*4]
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        EORS    R2, R2, #FIQ_mode       ; Was we in FIQ ? Zero if so
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        STR     R14, [R0, #6*4]

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        BNE     UNDEF2
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        MSR     CPSR_c, #I32_bit+F32_bit+ABT32_mode ; into ABT mode so we have a stack (try and preserve SVC stack for any exception dump that's produced)
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        Push    "r0"
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      [ ZeroPage <> 0
        LDR     R2, =ZeroPage
      ]
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        AddressHAL R2
        CallHAL HAL_FIQDisableAll
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        Pull    "r0"
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UNDEF2
; ... and fall into
UNDEF1
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        ; R0 points at R8 in register dump
        ; R7 points at error block
        MSR     CPSR_c, #I32_bit+F32_bit+ABT32_mode ; into ABT mode for exception dump
        SUB     R0, R0, #8*4            ; Make R0 sensible for vector
        MOV     R1, R7
        MOV     R2, #SeriousErrorV_Collect
        MOV     R10, #SeriousErrorV
        BL      CallVector
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        MSR     CPSR_c, #I32_bit+F32_bit+SVC32_mode ; into SVC mode
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        LDR     sp, =SVCSTK             ; Flatten superstack

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        ; Check that ExceptionDump is safe to use
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        Push    "R7"                    ; Preserve error ptr
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        LDR     R5, =ZeroPage
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        MOV     R3, R0
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        LDR     R1, [R5, #ExceptionDump]
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        MOV     R0, #24
        ADD     R2, R1, #17*4
        ; Must be SVC-writable, user+SVC readable, word aligned
        SWI     XOS_Memory
        AND     r1, r1, #CMA_Completely_UserR+CMA_Completely_PrivR+CMA_Completely_PrivW
        TEQ     r1, #CMA_Completely_UserR+CMA_Completely_PrivR+CMA_Completely_PrivW
        TSTEQ   r2, #3
        BEQ     %FT05
        ; Reset to default location. Unfortunately the Debugger module is a bit
        ; braindead and will only show the contents of the register dump located
        ; within its workspace, so resetting it to the kernel buffer isn't the
        ; best for debugging. But it's better than an infinite abort loop!
        MOV     R0, #ExceptionDumpArea
        LDR     R1, =ZeroPage+DUMPER
        SWI     XOS_ChangeEnvironment
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        Pull    "R14"                   ; Restore error ptr
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        ; Copy the dump from the stack to ExceptionDump
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        LDR     R0, [R5, #ExceptionDump]
        LDMIA   R3!, {R1-R2,R5-R10}     ; R0-R7
        STMIA   R0!, {R1-R2,R5-R10}
        LDMIA   R3, {R1-R2,R5-R11}      ; R8-R15, PSR
        STMIA   R0, {R1-R2,R5-R11}
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        SUB     R0, R0, #8*4
                                        ; try and put back user R10-R12
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        Push    "R5-R7"                 ; for error handler to find on stack
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        LDR     R1, [R0, #15*4]
        Push    R1

        LDR     R0, =GeneralMOSBuffer+128 ; so can do deviant sharing !

       [ International
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        LDR     r10, =ZeroPage
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        LDRB    r10, [r10, #ErrorSemaphore]
        TEQ     r10, #0                 ; if ok to translate error
        MOVEQ   r10, r14
        BEQ     %FT10
       ]

        LDR     r11, [r14], #4          ; Copy error number
        STR     r11, [r0], #4

01      LDRB    r11, [r14], #1          ; Copy error string
        STRB    r11, [r0], #1
        CMP     r11, #"%"               ; Test for "%" near end of string
        BNE     %BT01
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        SUB     r1, r0, #1              ; point, ready for conversion

        LDR     R2, =GeneralMOSBuffer+?GeneralMOSBuffer
        SUB     r2, r2, r1              ; amount left in buffer

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        LDR     R0, =ZeroPage
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        LDR     R0, [R0, #ExceptionDump]
        LDR     R0, [R0, #15*4]         ; saved PC
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        SUB     R0, R0, R4
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        SWI     XOS_ConvertHex8

      [ International
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        LDR     r4, =ZeroPage
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        LDRB    r4, [r4, #ErrorSemaphore]
        TEQ     r4, #0
        LDRNE   R0, =GeneralMOSBuffer+128
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        BNE     %FT20
        MOV     R4, R0
        MOV     R0, R10
        BL      TranslateError_UseR4
        ; If the exception dump processing takes too long then there's a good
        ; chance the error buffer MessageTrans gave us will get overwritten
        ; before we're able to call OS_GenerateError. Copy the error to the
        ; stack, then copy it back into a MessageTrans block before calling
        ; OS_GenerateError.
        EORS    R4, R0, R10 ; Did TranslateError work?
        BEQ     %FT20
        SUB     SP, SP, #256
        MOV     R4, SP
        MOV     R5, #4
        LDR     R6, [R0]
        STR     R6, [R4]
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        LDRB    R6, [R0, R5]
        CMP     R6, #0
        STRB    R6, [R4, R5]
        ADD     R5, R5, #1
        BNE     %BT11
        MOV     R0, R4
20
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      |
        LDR     R0, =GeneralMOSBuffer+128
      ]

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        ; Flatten UND and ABT stacks, jic
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        ; Also a convenient way of getting rid of the temp exception dump
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        MRS     R2, CPSR
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        BIC     R2, R2, #F32_bit + &1F
        ORR     R3, R2, #ABT32_mode
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        MSR     CPSR_c, R3                      ; FIQs back on
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        LDR     r13_abort, =ABTSTK
        ORR     R3, R2, #UND32_mode
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        MSR     CPSR_c, R3
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        LDR     r13_undef, =UNDSTK
        ORR     R3, R2, #IRQ32_mode
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        MSR     CPSR_c, R3
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        LDR     R1, =ZeroPage
      [ ZeroPage = 0
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        STR     R1, [R1, #IRQsema]
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      |
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        MOV     R3, #0
        STR     R3, [R1, #IRQsema]
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      ]
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        LDR     r13_irq, =IRQSTK
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        ; Trigger exception dump processing
        ORR     R3, R2, #SVC32_mode
        MSR     CPSR_c, R3

        ; Let everyone know that the stacks have been reset
        MOV     R2, #SeriousErrorV_Recover
        MOV     R10, #SeriousErrorV
        BL      CallVector

        ; Now enable IRQs and trigger exception dump processing
        MSR     CPSR_c, #SVC32_mode
        MOV     R2, #SeriousErrorV_Report
        MOV     R10, #SeriousErrorV
        BL      CallVector

      [ International
        ; Try and copy error block from stack back to MessageTrans
        LDR     R3, =ZeroPage
        LDRB    R3, [R3, #ErrorSemaphore]
        TEQ     R3, #0
        BNE     %FT30
        CMP     R4, #0 ; Check if original TranslateError call worked (if not, no error block to copy)
        BEQ     %FT30
        SWI     XMessageTrans_CopyError
        ; If TranslateError worked, assume MessageTrans_CopyError worked too
        ADD     SP, SP, #256
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      ]
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        SWI     OS_GenerateError

        LTORG

UNDEF ROUT
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        ; In UND32 mode, with a stack
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        ; Place exception dump on stack until we can be sure ExceptionDump is safe
        STR     R14, [SP, #-8]!
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        SETPSR  F_bit :OR: I_bit, R14
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        SUB     SP, SP, #17*4-8
        MOV     R14, SP
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        STMIA   R14!, {R0-R7}
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        MRS     R1, SPSR
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        STR     R1, [R14, #(16-8)*4]            ; save PSR
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        TST     R1, #T32_bit
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        MOV     R0, R14
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        MOVEQ   R4, #4
        MOVNE   R4, #2
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        BL      DumpyTheRegisters
        MakeErrorBlock UndefinedInstruction

ABORTP ROUT
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        ; In ABT32 mode, with a stack
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        STR     R14, [SP, #-8]!
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        SETPSR  F_bit :OR: I_bit, R14
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        SUB     SP, SP, #17*4-8
        MOV     R14, SP
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        STMIA   R14!, {R0-R7}
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        MRS     R1, SPSR
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        STR     R1, [R14, #(16-8)*4]            ; save PSR
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        MOV     R0, R14
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        MOV     R4, #4
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        BL      DumpyTheRegisters
        MakeErrorBlock InstructionAbort

ABORTD ROUT
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        ; In ABT32 mode, with a stack
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        STR     R14, [SP, #-8]!
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        SETPSR  F_bit :OR: I_bit, R14
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        SUB     SP, SP, #17*4-8
        MOV     R14, SP
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        STMIA   R14!, {R0-R7}
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        MRS     R1, SPSR
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        STR     R1, [R14, #(16-8)*4]            ; save PSR
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        MOV     R0, R14
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        MOV     R4, #8
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        BL      DumpyTheRegisters
        MakeErrorBlock DataAbort


ADDREX ROUT
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; This really can't happen. Honest
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        ; ??? in ABT32 mode, with a stack?
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        STR     R14, [SP, #-8]!
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        SETPSR  F_bit :OR: I_bit, R14
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        SUB     SP, SP, #17*4-8
        MOV     R14, SP
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        STMIA   R14!, {R0-R7}
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        MRS     R1, SPSR
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        STR     R1, [R14, #(16-8)*4]            ; save PSR
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        MOV     R0, R14
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        MOV     R4, #0
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        BL      DumpyTheRegisters
        MakeErrorBlock AddressException


; Can branch through zero in any mode
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; We go through a trampoline which stores R1 and R14 (at R14 on entry)
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Branch0_NoTrampoline_DummyRegs
        &       &DEADDEAD, &DEADDEAD
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RESET1 ROUT
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Branch0_NoTrampoline
        ADR     R14, Branch0_NoTrampoline_DummyRegs
Branch0_FromTrampoline
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        LDR     R1, =ZeroPage
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        LDR     R1, [R1, #ExceptionDump]
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        STMIA   R1, {R0-R12}
        STR     R13, [R1, #13*4]
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        LDR     R0, [R14, #0]
        STR     R0, [R1, #1*4]
        LDR     R0, [R14, #4]
        STR     R0, [R1, #14*4]
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 [ XScaleJTAGDebug
        MRS     R0, CPSR
        AND     R0, R0, #&1F
        TEQ     R0, #&15        ; Debug mode?
        BNE     %FT20
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        LDR     R13, =ZeroPage
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        LDR     R0, [R13, #ProcessorFlags]
        ORR     R0, R0, #CPUFlag_XScaleJTAGconnected
        STR     R0, [R13, #ProcessorFlags]
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        LDMIA   R1, {R0, R1}
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        B       DebugStub
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 ]
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        MOV     R0, #0
        STR     R0, [R1, #15*4]
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        MRS     R0, CPSR
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        STR     R0, [R1, #16*4]
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        SWI     XOS_EnterOS

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        LDR     R0, =ZeroPage
        LDR     R0, [R0, #ExceptionDump]
        ADD     R0, R0, #8*4

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        ADR     R7, ErrorBlock_BranchThrough0
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        MOV     R4, #0
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        B       UNDEF1
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        MakeErrorBlock BranchThrough0

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 [ XScaleJTAGDebug
        ; Magic from the Multi-ICE User Guide
        ALIGN   32
DebugStub ROUT
        ARM_read_control R13
        AND     R13, R13, #MMUC_I
        ORR     R14, R14, R13, LSR #12
        ARM_read_control R13
        ORR     R13, R13, #MMUC_I
        ARM_write_control R13
        ADR     R13, DebugStubLine2
        MCR     p15, 0, R13, C7, C5, 1
        MCR     p15, 0, R13, C7, C5, 6
10      MRC     p14, 0, R15, C14, C0
        BVS     %BT10
        MOV     R13, #&00B00000
        MCR     p14, 0, R13, C8, C0
20      MRC     p14, 0, R15, C14, C0
        BPL     %BT20
        ARM_read_control R13
        TST     R14, #1
        BICEQ   R13, R13, #MMUC_I
        ARM_write_control R13
        MRC     p14, 0, R13, C9, C0
        MOV     PC, R13
        ALIGN   32
DebugStubLine2
        SPACE   32
 ]
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; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
; SWI to call the UpCall vector
; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

DoAnUpCall ROUT

        Push    lr                  ; better have one of these to pull later !
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        MRS     r12, CPSR
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      [ NoARMT2
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        BIC     r12, r12, #&F0000000
        BIC     r12, r12, #I32_bit:OR:F32_bit
        AND     r10, lr, #&F0000000 ; copy user flags (I bit clear)
        ORR     r10, r10, r12
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      |
        MOV     lr, lr, LSR #28
        BIC     r10, r12, #I32_bit:OR:F32_bit
        BFI     r10, lr, #28, #4 ; copy user flags (I bit clear)
      ]
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        MSR     CPSR_cf, r10        ; ints on, stay in SVC mode, flags in psr
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        MOV     r10, #UpCallV
        BL      CallVector
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 [ NoARMT2
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        Pull    lr
        BIC     lr, lr, #&F0000000
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        MRS     R10, CPSR
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        MOV     R10, R10, LSR #(32-4)
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        ORR     lr, lr, R10, LSL #(32-4)
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 |
        MRS     R10, CPSR
        Pull    lr
        MOV     R10, R10, LSR #28
        BFI     lr, R10, #28, #4
 ]
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        ExitSWIHandler

; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
; SWI OS_ChangeEnvironment: Call the environment change vector
; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

ChangeEnvironment ROUT

        Push    lr
        MOV     R10, #ChangeEnvironmentV
        BL      CallVector
        Pull    lr
        B       SLVK_TestV


; ..... and the default handler .....

AdjustOurSet
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        WritePSRc SVC_mode+I_bit, R14
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        CMP     R0, #MaxEnvNumber
        BHI     AOS_Silly

1021
  [ {FALSE}
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        CMP     r0, #CallBackHandler
        BLEQ    testcallbackpending
  ]

        ADR     R10, AOS_Table
        ADD     R11, R0, R0, LSL #1   ; number * 3
        ADD     R10, R10, R11, LSL #2 ; point at entry

        MOV     R12, R1
        LDR     R11, [R10]
        CMP     R11, #0
        LDRNE   R1,  [R11]
        CMPNE   R12, #0
        STRNE   R12, [R11]

        MOV     R12, R2
        LDR     R11, [R10, #4]
        CMP     R11, #0
        LDRNE   R2,  [R11]
        CMPNE   R12, #0
        STRNE   R12, [R11]

        MOV     R12, R3
        LDR     R11, [R10, #8]
        CMP     R11, #0
        LDRNE   R3,  [R11]
        CMPNE   R12, #0
        STRNE   R12, [R11]

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        Pull    pc
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AOS_Silly
        ADR     r0, ErrorBlock_BadEnvNumber
      [ International
        BL      TranslateError
      ]
exit_AOS
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        SETV
        Pull    "pc"
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        MakeErrorBlock BadEnvNumber

AOS_Table
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        &  ZeroPage+MemLimit     ;  MemoryLimit
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        &  0
        &  0

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        &  ZeroPage+UndHan       ; UndefinedHandler
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        &  0
        &  0

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        &  ZeroPage+PAbHan       ; PrefetchAbortHandler
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        &  0
        &  0

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        &  ZeroPage+DAbHan       ; DatabortHandler
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        &  0
        &  0

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        &  ZeroPage+AdXHan       ; AddressExceptionHandler
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        &  0
        &  0

        &  0            ; OtherExceptionHandler
        &  0
        &  0

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        &  ZeroPage+ErrHan       ; ErrorHandler
        &  ZeroPage+ErrHan_ws
        &  ZeroPage+ErrBuf
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        &  ZeroPage+CallAd       ; CallBackHandler
        &  ZeroPage+CallAd_ws
        &  ZeroPage+CallBf
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        &  ZeroPage+BrkAd        ; BreakPointHandler
        &  ZeroPage+BrkAd_ws
        &  ZeroPage+BrkBf
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        &  ZeroPage+EscHan       ; EscapeHandler
        &  ZeroPage+EscHan_ws
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        &  0

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        &  ZeroPage+EvtHan       ; EventHandler
        &  ZeroPage+EvtHan_ws
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        &  0

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        &  ZeroPage+SExitA       ; ExitHandler
        &  ZeroPage+SExitA_ws
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        &  0

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        &  ZeroPage+HiServ       ; UnusedSWIHandler
        &  ZeroPage+HiServ_ws
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        &  0

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        &  ZeroPage+ExceptionDump ; ExceptionDumpArea
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        &  0
        &  0

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        &  ZeroPage+AplWorkSize  ; application space size
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        &  0
        &  0

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        &  ZeroPage+Curr_Active_Object
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        &  0
        &  0

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        &  ZeroPage+UpCallHan
        &  ZeroPage+UpCallHan_ws
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        &  0

        assert (.-AOS_Table)/12 = MaxEnvNumber

; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
; SWI OS_ReadDefaultHandler

; In    r0 = environment number

ReadDefaultHandler ROUT

        CMP     r0, #(dhte-defhantab)/12
        MOVHS   r0, #0                  ; return wally value
        ADD     r10, r0, r0, LSL #1     ; *3
        ADD     r10, pc, r10, LSL #2    ; *4 (pc = defhantab-4)
        LDMIB   r10, {r1-r3}            ; gives additional +4
        ExitSWIHandler

defhantab
     & 0                ; wally entry
     & 0
     & 0

     & UNDEF            ; UndefinedHandler
     & 0
     & 0

     & ABORTP           ; PrefetchAbortHandler
     & 0
     & 0

     & ABORTD           ; DataAbortHandler
     & 0
     & 0

     & ADDREX           ; AddressExceptionHandler
     & 0
     & 0

     & 0                ; OtherExceptionHandler
     & 0
     & 0

     & ERRORH           ; ErrorHandler
     & 0
     & GeneralMOSBuffer

     & NOCALL           ; CallBackHandler
     & 0
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     & ZeroPage+DUMPER
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     & DEFBRK           ; BreakPointHandler
     & 0
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     & ZeroPage+DUMPER
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