GitLab

Not tagged

Detail:
  hdr/StaticWS - Reserve workspace for QA7 peripheral address, HAL-wide spinlock, and doorbell device
  Makefile, s/DBell - Add doorbell device implementation
  hdr/BCM2835 - Clean up dead macros, add new macros for spinlock claim/release and basic CPU detection. Define new IRQ numbers for the "QA7" peripheral.
  hdr/CastleMacros, s/Top - Generate two HAL descriptors and entry point tables: One for single-core machines and one for multi-core machines. This avoids some MP-related overheads on ARM11 models of Pi. Implement SMP HAL entry points.
  s/Interrupts - Add support for the QA7 interrupts. Although some interrupts can be flexibly routed to different cores, we currently stick with a static scheme.
  s/Messaging - Use CPUDetect macro
Admin:
  Untested
  Requires Kernel-6_09


Version 0.76. Tagged as 'BCM2835-0_76'

Top.s: HAL_UARTStartUp takes 0's based UART numbers, so the debug setup would go wrong (if HAL_UARTStartUp actually checked the value).
UART.s: Re-express the baud register default value so its origin is clear.
Retagged as BCM2835-0_75 as the (non-debug) version is binary identical.

Add Pi3 B+ and Zero W.
Split out CM3 from CM1, since the CM3 reuses some high GPIO lines as bit bashed SMPSU IIC bus, so we can't offer those for GPIO like on CM1.

Version 0.75. Tagged as 'BCM2835-0_75'

Detail:
  hdr/BCM2835 - Add some new board revision values
  s/SDIO - Treat the 3B+ the same as the 3B when handling the activity LED. Also detect the Embest-manufactured CM1 and treat it the same as the Sony one.
Admin:
  Tested on Raspberry Pi 3B+


Version 0.74. Tagged as 'BCM2835-0_74'

Detail:
  s/KbdScan - Add RTSupport to the list of modules (dependency of DWCDriver)
Admin:
  Tested on Raspberry Pi 3


Version 0.73. Tagged as 'BCM2835-0_73'

Detail:
  Add keyboard scan code with list of modules that the kernel needs to do the same.
  Reorder the HALEntries to match Kernel-5_89.
  Remove unused stub functions (now KbdScan exists).
Admin:
  Submission for USB bounty.

Version 0.72. Tagged as 'BCM2835-0_72'

Detail:
  Firmware as of 28th July will allow the GPU to make use of the top 16MB of RAM in 1GB machines. This overlaps the ARM's IO space, essentially making that area of memory inaccessible to us.
  This causes problems because we rely on a couple of buffers which are located in VC memory (virtual GPIO buffer & FT5406 touchscreen buffer)
  At some point extra mailbox messages were added to allow the ARM to dictate the location of these buffers; so make use of those messages wherever possible.
  File changes:
  s/Messaging - Remove VirtGPIOBuf and TouchBuf related tags from the initialisation tag sequence. Add new GetVCBuffer function that can be called post-MMU init to deal with getting/setting the buffer addresses.
  s/Top - Use GetVCBuffer to initialise VirtGPIOBuf
  s/Touch - Use GetVCBuffer to get touchscreen buffer
  hdr/StaticWS - Remove TouchBuf from workspace, no longer needed
Admin:
  Tested on Raspberry Pi 3 with firmware from March 2016 (Set commands not supported), 21st July 2017 (set commands supported, but upper 16MB not used), 28th July 2017 (set commands supported and necessary)


Version 0.71. Tagged as 'BCM2835-0_71'

GPOI -> GPIO
set -> cleared
No code change, not tagged.

Apparently there are some A+ 1.1 and B+ 1.2's in the wild not built with their former id's (0x12 and 0x13) but using the newer 24 bit id scheme. Add aliases for these.

Version 0.70. Tagged as 'BCM2835-0_70'

The SDIO HAL device reports when it is sure fixed disc media is attached (ie. eMMC soldered on the same PCB) which causes SDFS to report this to FileCore as a fixed disc, skipping the removable safety checks.
However, CM3 and CM3L both return the same board id so we can't work out which is which. Additionally, someone could attach an external eMMC in theory on a custom expansion board (instead of an SD card socket like the CMIO has).
To resolve this, we assign IO expander line 6 of U8 to be a safety catch. If that line is held low, it signifies this is definitely a CM3 - in effect this is a "definitely has eMMC" or "maybe has eMMC" switch.

Tested on CM1, CM3, CM3L, and a suitably modified CM3 with the help of Chris Hall.

Version 0.69. Tagged as 'BCM2835-0_69'

Remove the baffling double indirection of RamAd (and unused exports SerNo and MacAdd), and treat these the same as the other pre-HAL_Init query results.
This means the scope of the tagbuffer is limited to Messaging.s, rather than having to be kept preserved globally.
Use memcpy() to copy tag list to tagbuffer for clarity.
Tested on a Pi 3.

Version 0.68. Tagged as 'BCM2835-0_68'

In HAL_QueryPlatform a mixture of register naming overlooks r6 (aka v3) gets used, but not preserved.
Uppercase opcodes, add a few more comments around the CRC calculation.

Some misleading notes about IIC0, and other minor clarifications.

Detail:
  Move the register accesses for GPIO to the HAL, since they are hardware specific.
  Add recognition of board types for Pi 3, Compute module 3, rev 3 Pi 0's, and the newer Pi 2's with BCM2837 on them.
Admin:
  Based in part on a submission from Tank.
  Tested on a Pi 2. Requires corresponding GPIO module (tag GPIO-1_00-1_11_2_1 or later).

Version 0.67. Tagged as 'BCM2835-0_67'

Detail:
  hdr/BCM2835 - Add switch to allow GPIOs 22-27 to be reconfigured for ARM JTAG access
  s/Top - Configure GPIOs for JTAG if switch enabled
  s/GPIO - Disable GPIO HAL device if JTAG enabled (try and avoid any software messing with the pins)
Admin:
  Tested on Raspberry Pi 1 B, B+


Version 0.66. Tagged as 'BCM2835-0_66'

Detail:
  s/Top - Update internal HAL debug functions to preserve all the required registers; the new HAL_Debug / UART function implementations corrupt more of the caller-save registers than the old ones did
Admin:
  Tested on Raspberry Pi


Version 0.65. Tagged as 'BCM2835-0_65'

Detail:
  Look at the reset status register and use the HADPOR flag to influence the OSStartFlag_POR value.
  Fixes problem of OS_Byte 253 always reporting a hard reset, never a power on reset.
Admin:
  Tested on a Pi 2.
  Submission for USB bounty.

Version 0.64. Tagged as 'BCM2835-0_64'

Detail:
  s/UART - Update HAL_UARTReceiveByte to clear error IRQs when the FIFO is believed to be empty. Disable IRQs in some complex routines to prevent any re-entrancy issues, and also clear the RX threshold IRQ when flushing the FIFOs or adjusting the threshold level.
Admin:
  Tested on Raspberry Pi 1
  Resolves ticket #429


Version 0.63. Tagged as 'BCM2835-0_63'

Detail:
  Useful if not just SDIO can see the definitions.

Version 0.62. Tagged as 'BCM2835-0_62'

The Pi is unusual in self modifying the ROM image when a CMOS setting was changed (due to there being none on the PCB), with the potential of ending up with a corrupt OS image on disc.
Remove this code and emulate the CMOS using normal RAM, and using the Pi firmware to load the CMOS file in for us (like fatload does on OMAP based designs) by using its ability to load a second arbitrary file at an address, intended in the Linux world to load a disc image.

To use this you will need to add
  ramfsfile=CMOS
  ramfsaddr=0x508000
to config.txt which loads it 5MB (ie. ImageSize) above the default load address (&8000), though as noted in the changes to BCM2835-0_60 we don't really need to load at offset &8000 but generally do since that's the Pi firmware's default.

hdr/StaticWS:
New workspace to hold our CMOS copy.
CMOS.s:
Remove the 2k magic block, add a simple bytewise copy loop implementation.
SDIO.s:
Extend ADR range.
Top.s:
Copy what the Pi firmware loads somewhere safe until the MMU is on, then copy it back (converting from logical to physical order along the way).
Change other values recovered from pre-MMU times using advanced post indexed addressing technology (TM) rather than switching around sb a lot.

Tested on a Pi 3, with and without an initial CMOS file present.

Version 0.61. Tagged as 'BCM2835-0_61'

IIC.s/Stubs.s:
Don't import workspace when it's not used
Top.s:
Move the dead loops to just after the vectors. In practice these are ineffectual because the firmware (now) loads the image at &8000 to please Linux, so we're mostly wasting our time producing ROM images with vectors at the start.
Pad image to &8000 so it can be loaded at 0 (using Kernel_Old=1 in config.txt) or &8000 (default).
Line up/capitalise a few stray mnemonics, use APCS register naming.
Call HAL_DebugTXStrInline for "HAL Init completed" rather than an inline loop, since earlier in the same function we called HAL_DebugTXStrInline happily.

Version 0.60. Tagged as 'BCM2835-0_60'

Detail:
  hdr/BCM2835, hdr/StaticWS, s/Debug, s/Top, s/Video - Fix up the two serial debug switches to work correctly. Disable debug by default.
  s/UART, hdr/UART - Implement HAL UART API, for the PL011 UART.
Admin:
  Tested on Raspberry Pi 1 B
  Requires DualSerial 0.25 to work correctly


Version 0.59. Tagged as 'BCM2835-0_59'

Detail:
  s/SDIO - Add a GET of Hdr:CPU.Arch, as it's now required for use of the DivRem macro
Admin:
  Tested on Raspberry Pi


Version 0.58. Tagged as 'BCM2835-0_58'

Detail:
  s/SDIO - Signed counter wrap-around once &80007fff was reached was causing the code to think the activity LED was permanently off, resulting in the code only making "turn on" requests. Calculating the difference as a (signed) 16bit value solves the problem.
Admin:
  Tested on Pi 3 B
  Fixes SD activity LED being stuck on after e.g. letting Verify run for a few seconds.


Version 0.57. Tagged as 'BCM2835-0_57'

Detail:
  s/Top - Fix cores sat in the holding pattern waiting on a write to the wrong address. Also, set up lr so we can return to the holding pattern if desired.
Admin:
  Tested on Pi 3 B
  Now possible to launch simple code sequences on the other cores


Version 0.56. Tagged as 'BCM2835-0_56'

Detail:
  s/Top - On multi-core chips, the ARM boot stub has the other cores sat waiting in a loop near &0. Clearing RAM will inadvertantly break them out of this and most likely cause random crashes later on, so inbetween relocating the ROM and clearing RAM make sure we put the cores into a sleep loop in the HAL. Further mailbox writes can then be used to break them out of this loop, using a similar scheme to that used to break them out of the boot stub loop.
  hdr/BCM2835 - Add some register definitions from the BCM2836 docs
Admin:
  Tested on Pi 2B, 3B
  Not currently dealing with kernel_old=1 case where all cores enter the ROM on startup


Version 0.55. Tagged as 'BCM2835-0_55'

Detail:
  hdr/BCM2835 - Remove mailbox definitions - use the ones exported by BCMSupport to avoid needless duplication
  hdr/StaticWS, s/Messaging, s/Top - Use the mailbox property interface to request & map in the virtual GPIO buffer (if present)
  s/SDIO - On the Pi 3B, the GPIO that was used for the SD activity GPIO is now used for a different purpose. To control the activity LED we need to go via an I2C attached GPIO extender, which itself is exposed to the ARM via the new "virtual GPIO" buffer
  s/VCHIQ - Update to use BCMSupport mailbox definitions
Admin:
  Tested on Pi 1B, 3B


Version 0.54. Tagged as 'BCM2835-0_54'

Detail:
  s/IIC - Only adjust the pin mux settings for the pins + IIC controller which we're using, the other pins/controllers might be being used for another purpose (on Pi 3 GPIO0/SDA0 seems related to power control/under-voltage detection)
Admin:
  Tested on Pi 3
  Fixes constant rainbow square (under-volt warning) shown by firmware and inability to scale clock speed above default


Version 0.53. Tagged as 'BCM2835-0_53'

Detail:
  s/Messaging - Ensure the PL011 UART module clock is set to 3MHz on startup, in order to allow the debug terminal to work
  hdr/StaticWS, s/Top - Add a basic HAL device to expose the GPU mailboxes
Admin:
  Tested on Raspberry Pi 1B/2B/3B
  Fixes garbled debug terminal input/output on Pi 3


Version 0.52. Tagged as 'BCM2835-0_52'

Detail:
  s/Stubs, s/Top - Remove references to deleted HAL ATA calls
  s/GPIO, s/Top - Add implementation of HAL_PlatformName. Located in s/GPIO to allow easy re-use of the board revision table.
Admin:
  Tested on Pi 2 Model B


Version 0.51. Tagged as 'BCM2835-0_51'

Detail:
  Makefile, s/Touch - Basic HAL device for the official touchscreen, which just exposes the address of the buffer which the GPU periodically fills with a register dump of the touchscreen controller.
  hdr/BCM2835 - Remove old comment. Add new tag for getting the touchscreen buffer address.
  hdr/StaticWS - Remove old workspace entries. Add new entries for touchscreen.
  s/Messaging - Remove the messagebox tags which set a screen mode on startup (BCMVideo will handle that for us), and just blank the screen instead (to stop the GPU displaying a coloured square). Add tag to get the touchscreen buffer address.
  s/Top - Register touchscreen HAL device during HAL_InitDevices. Remove more old code.
Admin:
  Tested on Raspberry Pi 1 B


Version 0.50. Tagged as 'BCM2835-0_50'

Detail:
  * Recent versions of the firmware call the ROM's entry point in HYP mode
    (except for ARM11 boards which don't have it). Detect this eventuality
    and drop into SVC mode safely if so.
  * Whilst testing this fix, I discovered that occasionally, secondary CPUs
    seem to be being woken up, and start executing the ROM entry point also.
    This shouldn't be happening, but for safety's sake, I'm detecting this
    eventuality and putting any secondary CPUs into a sleep loop.
Admin:
  Tested on Pi 1 and 2. Requires HdrSrc 2.56.

Version 0.49. Tagged as 'BCM2835-0_49'

Hdr:GPIODevice is already included via StaticWS.

Version 0.48. Tagged as 'BCM2835-0_48'

Detail:
  s/DMA - Although there are already plenty of memory barriers present to deal with the BCM2835's dodgy peripheral interface, code examination suggests one extra barrier is needed to make sure things will work correctly once the default NCB cache policy is Normal, non-cacheable rather than Device.
Admin:
  Tested on Raspberry Pi 1


Version 0.47. Tagged as 'BCM2835-0_47'

Detail:
  hdr/StaticWS, s/Top - Removed code to map in all of VC memory. Currently nothing needs it, and the code was broken anyway (debug output would corrupt a1 value given to OS_MapInIO)
Admin:
  Tested on Raspberry Pi


Version 0.46. Tagged as 'BCM2835-0_46'

Detail:
  s/SPI - Basic HAL devices for the 3 SPI controllers. These expose the register addresses & IRQ numbers, and (for SPI1 & SPI2) deal with enabling/disabling the hardware and the shared IRQ line. GPIO mapping currently isn't dealt with - we don't know which pin group to use (SPI0 can use two different sets on the compute) or how many chip select lines are desired.
  Makefile - Add SPI source
  hdr/BCM2835 - Add aux SPI registers
  hdr/StaticWS - Reserve workspace for the HAL devices
  s/Top - Register new devices in HAL_InitDevices
Admin:
  Tested on Raspberry Pi B & 2 B


Version 0.45. Tagged as 'BCM2835-0_45'

Note, this scheme remains non future proof as any later model numbers released will be miscategorised as the last table entry.

Version 0.44. Tagged as 'BCM2835-0_44'

Detail:
  hdr/BCM2835 - Errata 814220 states that the Cortex-A7 set/way cache maintenance operations violate the usual operation ordering rules, such that an L2 maintenance operation which is started after an L1 operation may actually complete before it, causing data corruption if the L1 data was to be evicted to the L2 entry. Implement the suggested workaround of performing a DSB when switching cache levels, rather than just at the end of the combined L1+L2 group of operations.
  Also, fix missing 99 label that would have caused a stack imbalance in the unlikely event of encountering a processor with fully coherent caches
Admin:
  Tested on Raspberry Pi 2


Version 0.43. Tagged as 'BCM2835-0_43'

Detail:
  Parses the revision ID bitfield for new-style revisions - should provide
  some level of forward compatibility at last. The equivalent code in s.GPIO
  hasn't been tackled yet, mainly because it requires some thought about how
  best to handle the Compute module (given that the daughter card can be
  plugged into any number of devices, each of which will use GPIO differently).
Admin:
  Tested on Compute module and Pi 2 with latest firmware.

Version 0.42. Tagged as 'BCM2835-0_42'