1. 07 Jul, 2012 1 commit
    • Jeffrey Lee's avatar
      Add DMA driver · 985c7199
      Jeffrey Lee authored
      Detail:
        s/DMA, hdr/DMA, Makefile - DMA driver, as an implementation of the DMA controller and list type DMA channel HAL devices
        hdr/StaticWS - Added DMA workspace definition
        hdr/BCM2835 - Removed DMA control block definition (now in hdr/DMA). Add definitions for the mailbox property interface, which should be supported by the GPU firmware sometime soon.
        s/Top - Export a couple of the debug functions. Store logical & physical address of NCNB workspace instead of hackily getting phys addr of the (cacheable) HAL workspace. Call DMA_InitDevices in HAL_InitDevices.
      Admin:
        Tested in BCM2835 ROM
        DMA driver hasn't received large amounts of testing, lacks support for finite-length circular transfers, and currently only has one DMA channel enabled
        More DMA channels should be available once the mailbox property interface is functional and we know which channels the GPU does and doesn't use.
      
      
      Version 0.11. Tagged as 'BCM2835-0_11'
      985c7199
  2. 15 Jun, 2012 1 commit
    • Ben Avison's avatar
      SD support, and miscellaneous other changes · 981cfe6d
      Ben Avison authored
      Detail:
        * Bugfix to HAL_FIQDisableAll - it wasn't clearing the FIQ register (would
          only have caused trouble in practice if the same device was subsequently
          enabled as an IRQ).
        * Added a load of memory barriers to s.Interrupts and s.Timers to conform
          to the requirement stated in 1.3 of the datasheet.
        * Added a HAL device for the Arasan SDHCI controller. Note that this does
          not currently work reliably, and results vary from card to card. High
          speed support is currently disabled until we are able to verify that it
          works reliably.
        * Added a sprinkling of "GET Hdr:ListOpts" because the space reserved for
          the SDHCI HAL device in hdr.StaticWS is determined by including
          Hdr:HALDevice and Hdr:SDHCIDevice, which need it.
        * When support for saving "CMOS" to the SD card is added, the ROM image
          file (kernel.img) is the only one we can count on the bootloader
          installing in memory, so I think we're going to have to work using the
          table in s.CMOS. Broadcom seems to like messing around with the space
          just after the processor vector table, so rather than adding a pointer
          to the table there, I've opted to mark it using a magic word.
      Admin:
        Tested on a Raspberry Pi - as noted above, there are reliability issues.
      
      Version 0.09. Tagged as 'BCM2835-0_09'
      981cfe6d
  3. 23 May, 2012 1 commit
    • Ben Avison's avatar
      Complete rework of timer and interrupt code · 2579b887
      Ben Avison authored
      Detail:
       * Moved interrupt and timer code out of s.Stubs - they're not stubs any more.
       * Rewrote timer and counter code to use GPU system timer 1 for our Timer0
         rather than the ARM timer. This is recommended in the Broadcom datasheet
         because it's driven from the APB clock and so its speed will vary in
         reduced or low power mode.
       * HAL_CounterDelay now, well, does a delay!
       * Added a Timer1, driven from GPU system timer 3 - common code with Timer0.
       * Reshuffled device numbers so the GPU interrupts are at the bottom. This
         works better for FIQs and makes Timer0 the lowest priority interrupt.
       * Higher device numbers are now consistently treated as higher priority.
       * Stopped using bits 8-31 of the basic interrupt registers. These can't be
         masked, so they cause the kernel to lock up if generated, which happens
         if the GPU interrupt which they alias is generated (which appears to
         include the timers even though this is not documented).
       * Added definitions for all the interrupts, including those redacted from the
         datasheet - we need them at least for timers, USB and SD.
       * Stopped HAL_IRQClear from doing anything - this interrupt controller
         doesn't do latching. To acknowledge timer interrupts, you should use
         HAL_TimerIRQClear (and HAL_IRQClear too for compatibility with other ports).
       * Implemented HAL_IRQStatus and all the FIQ control routines.
       * Offsets to interrupt controller registers now use symbolic names.
       * Replaced some hard spaces in sources with normal ones.
      Admin:
        Tested on a beta Raspberry Pi. Confirmed that interrupt handlers for both
        ARM and GPU sources can both be operational simultaneuosly. However, the FIQ
        code has not been tested. Timer0 is verified as running at the correct
        speed and reporting a count *down* in the correct range (not a count up as
        some previous versions did). HAL_CounterDelay appears correct also.
      
      Version 0.04. Tagged as 'BCM2835-0_04'
      2579b887
  4. 10 May, 2012 1 commit
    • Ben Avison's avatar
      Initial import of BCM2835 (Raspberry Pi) HAL · bfa96cd9
      Ben Avison authored
      Detail:
        Covers the basic functionality, but does require a customised start.elf
        to function. The vast majority is an entirely new implementation and is
        BSD licenced, but 4% (the Makefile and a handful of simple macros) are
        copied from pre-existing Castle-licenced code, so it lives under the
        "mixed" hierarchy. If other HALs are anything to go by, we'll end up
        having to add more Castle code (at least some C runtime functions) so it's
        probably juast as well.
      Admin:
        Code received from Adrian Lees
      bfa96cd9