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Commit b0ddf21a authored by Robert Sprowson's avatar Robert Sprowson
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Safe GPIO pins table updates 

Add Pi3 B+ and Zero W.
Split out CM3 from CM1, since the CM3 reuses some high GPIO lines as bit bashed SMPSU IIC bus, so we can't offer those for GPIO like on CM1.

Version 0.75. Tagged as 'BCM2835-0_75'
parent f90ce9ec
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Showing with 44 additions and 25 deletions
VersionNum
View file @ b0ddf21a
/* (0.74)
/* (0.75)
*
* This file is automatically maintained by srccommit, do not edit manually.
* Last processed by srccommit version: 1.1.
*
*/
#define Module_MajorVersion_CMHG 0.74
#define Module_MajorVersion_CMHG 0.75
#define Module_MinorVersion_CMHG
#define Module_Date_CMHG 19 Mar 2018
#define Module_Date_CMHG 21 Mar 2018
#define Module_MajorVersion "0.74"
#define Module_Version 74
#define Module_MajorVersion "0.75"
#define Module_Version 75
#define Module_MinorVersion ""
#define Module_Date "19 Mar 2018"
#define Module_Date "21 Mar 2018"
#define Module_ApplicationDate "19-Mar-18"
#define Module_ApplicationDate "21-Mar-18"
#define Module_ComponentName "BCM2835"
#define Module_ComponentPath "mixed/RiscOS/Sources/HAL/BCM2835"
#define Module_FullVersion "0.74"
#define Module_HelpVersion "0.74 (19 Mar 2018)"
#define Module_LibraryVersionInfo "0:74"
#define Module_FullVersion "0.75"
#define Module_HelpVersion "0.75 (21 Mar 2018)"
#define Module_LibraryVersionInfo "0:75"
s/GPIO
View file @ b0ddf21a
......@@ -205,22 +205,28 @@ GPIORevision_RaspberryPi_B_1 # 1 ; Model B Rev 1.0
GPIORevision_RaspberryPi_B_2 # 1 ; Model B Rev 2.0
GPIORevision_RaspberryPi_A_2 # 1 ; Model A Rev 2.0
GPIORevision_RaspberryPi_BPlus # 1 ; Model B+
GPIORevision_RaspberryPi_C_1 # 1 ; Model Compute Rev 1.0
GPIORevision_RaspberryPi_C_1 # 1 ; Model CM1
GPIORevision_RaspberryPi_C_3 # 1 ; Model CM3
GPIORevision_RaspberryPi_APlus # 1 ; Model A+
GPIORevision_RaspberryPi_Mk2_B_1 # 1 ; Model Pi 2
GPIORevision_RaspberryPi_Mk2_B # 1 ; Model Pi 2 B
GPIORevision_RaspberryPi_Zero # 1 ; Model Zero
GPIORevision_RaspberryPi_Mk3_B_1 # 1 ; Model Pi 3
GPIORevision_RaspberryPi_ZeroW # 1 ; Model ZeroW
GPIORevision_RaspberryPi_Mk3_B # 1 ; Model Pi 3 B
GPIORevision_RaspberryPi_Mk3_BPlus # 1 ; Model Pi 3 B+
GPIORevision_RaspberryPi_Max # 0
Name_B_1 = "Raspberry Pi B PCB 1.0", 0
Name_B_2 = "Raspberry Pi B PCB 2.0", 0
Name_A_2 = "Raspberry Pi A", 0
Name_BPlus = "Raspberry Pi B+", 0
Name_C_1 = "Raspberry Pi Compute Module", 0
Name_C_1 = "Raspberry Pi Compute Module 1", 0
Name_C_3 = "Raspberry Pi Compute Module 3", 0
Name_APlus = "Raspberry Pi A+", 0
Name_Mk2_B_1 = "Raspberry Pi 2 Model B", 0
Name_Mk2_B = "Raspberry Pi 2 Model B", 0
Name_Zero = "Raspberry Pi Zero", 0
Name_Mk3_B_1 = "Raspberry Pi 3 Model B", 0
Name_ZeroW = "Raspberry Pi Zero W", 0
Name_Mk3_B = "Raspberry Pi 3 Model B", 0
Name_Mk3_BPlus = "Raspberry Pi 3 Model B+", 0
Name_Unknown = "Raspberry Pi Unknown", 0
ALIGN
......@@ -230,10 +236,13 @@ GPIO_Board_Names_Table ; same order as GPIORevision_RaspberryPi types
DCD Name_A_2
DCD Name_BPlus
DCD Name_C_1
DCD Name_C_3
DCD Name_APlus
DCD Name_Mk2_B_1
DCD Name_Mk2_B
DCD Name_Zero
DCD Name_Mk3_B_1
DCD Name_ZeroW
DCD Name_Mk3_B
DCD Name_Mk3_BPlus
ASSERT (.-GPIO_Board_Names_Table) :SHR: 2 = GPIORevision_RaspberryPi_Max
; Lookup table to determine board type (old style)
......@@ -279,17 +288,21 @@ GPIO_Board_Conversion_Table
DCD BoardRevision_Mem_512M+BoardRevision_Model_BPlus+(2:SHL:BoardRevision_Rev_Shift)
DCD GPIORevision_RaspberryPi_BPlus
DCD BoardRevision_Mem_1G+BoardRevision_Model_B2+(1:SHL:BoardRevision_Rev_Shift)
DCD GPIORevision_RaspberryPi_Mk2_B_1
DCD GPIORevision_RaspberryPi_Mk2_B
DCD BoardRevision_Mem_1G+BoardRevision_Model_B2+(2:SHL:BoardRevision_Rev_Shift)
DCD GPIORevision_RaspberryPi_Mk2_B_1
DCD GPIORevision_RaspberryPi_Mk2_B
DCD BoardRevision_Mem_512M+BoardRevision_Model_Zero+(2:SHL:BoardRevision_Rev_Shift)
DCD GPIORevision_RaspberryPi_Zero
DCD BoardRevision_Mem_512M+BoardRevision_Model_Zero+(3:SHL:BoardRevision_Rev_Shift)
DCD GPIORevision_RaspberryPi_Zero
DCD BoardRevision_Mem_1G+BoardRevision_Model_B3+(2:SHL:BoardRevision_Rev_Shift)
DCD GPIORevision_RaspberryPi_Mk3_B_1
DCD GPIORevision_RaspberryPi_Mk3_B
DCD BoardRevision_Mem_1G+BoardRevision_Model_Compute3+(0:SHL:BoardRevision_Rev_Shift)
DCD GPIORevision_RaspberryPi_C_1
DCD GPIORevision_RaspberryPi_C_3
DCD BoardRevision_Mem_512M+BoardRevision_Model_ZeroW+(1:SHL:BoardRevision_Rev_Shift)
DCD GPIORevision_RaspberryPi_ZeroW
DCD BoardRevision_Mem_1G+BoardRevision_Model_B3Plus+(3:SHL:BoardRevision_Rev_Shift)
DCD GPIORevision_RaspberryPi_Mk3_BPlus
DCD &FF
; Initialise our HAL devices
......@@ -927,16 +940,22 @@ GPIOFreeToUse
DCD 2_00000000000000000000000000000000
DCD 2_00001111111111111111111111111111 ; B+
DCD 2_00000000000000000000000000000000
DCD 2_11111111111111111111111111111111 ; Compute rev 1
DCD 2_00000000000000001111111111111111
DCD 2_11111111111111111111111111111111 ; Compute CM1
DCD 2_00000000000000000111111111111111
DCD 2_11111111111111111111111111111111 ; Compute CM3
DCD 2_00000000000000000011111111111111
DCD 2_00001111111111111111111111111111 ; A+
DCD 2_00000000000000000000000000000000
DCD 2_00001111111111111111111111111111 ; 2B
DCD 2_00000000000000000000000000000000
DCD 2_00001111111111111111111111111111 ; zero
DCD 2_00001111111111111111111111111111 ; Zero
DCD 2_00000000000000000000000000000000
DCD 2_00001111111111111111111111111111 ; ZeroW
DCD 2_00000000000000000000000000000000
DCD 2_00001111111111111111111111111111 ; 3B
DCD 2_00000000000000000000000000000000
DCD 2_00001111111111111111111111111111 ; 3B+
DCD 2_00000000000000000000000000000000
; Pin enumerations
GPIO_Port0_Table
......
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