; Copyright 2015 Castle Technology Ltd
;
; Licensed under the Apache License, Version 2.0 (the "License");
; you may not use this file except in compliance with the License.
; You may obtain a copy of the License at
;
;     http://www.apache.org/licenses/LICENSE-2.0
;
; Unless required by applicable law or agreed to in writing, software
; distributed under the License is distributed on an "AS IS" BASIS,
; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
; See the License for the specific language governing permissions and
; limitations under the License.
;

        [       :LNOT: :DEF: __HAL_ENETDevice_HDR__
        GBLL    __HAL_ENETDevice_HDR__
; Define a HAL device to let the HAL pass addresses to modules
        GET     Hdr:HALDevice
                                ^       0
HALDevice_ENET                  #       HALDeviceSize
; Additional device fields
HALDevice_ENET_Phy_Device       #       4       ; Phy IRQ number
HALDevice_ENET_Phy_IRQ_En       #       4       ; IRQ enable/disable
HALDevice_ENET_Phy_IRQ_Test     #       4       ; phy irqbit test
HALDevice_ENET_Phy_IRQ_Clear    #       4       ; phy irqbit clear
; the next 2 are exported explicitly to permit quick test of phy interrupt
HALDevice_ENET_Phy_IRQTAddr     #       4       ; phy irq test address
HALDevice_ENET_Phy_IRQTMask     #       4       ; phy irq test active bit mask
HALDevice_ENETSpecificField     #       4
HALDevice_ENETClock             #       4
HALDevice_ENET_PhyPwrRst        #       4       ; Phy power and reset control
HALDevice_ENET_Size             *       :INDEX: @

        ] ; __HAL_ENETDevice_HDR__

        END