; Copyright 2000 Pace Micro Technology plc
;
; Licensed under the Apache License, Version 2.0 (the "License");
; you may not use this file except in compliance with the License.
; You may obtain a copy of the License at
;
;     http://www.apache.org/licenses/LICENSE-2.0
;
; Unless required by applicable law or agreed to in writing, software
; distributed under the License is distributed on an "AS IS" BASIS,
; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
; See the License for the specific language governing permissions and
; limitations under the License.
;
; Entries to the OS from the HAL

                ^       0
OS_InitARM      #       1
OS_AddRAM       #       1
OS_Start        #       1
OS_MapInIO      #       1
OS_AddDevice    #       1
OS_LogToPhys    #       1

HighestOSEntry  *       :INDEX: @ - 1

; The layout of the OS header
                ^       0
OSHdr_Magic     #       4
OSHdr_Flags     #       4
OSHdr_ImageSize #       4
OSHdr_Entries   #       4
OSHdr_NumEntries #      4
OSHdr_size      #       0

; Parameters/flag for various calls

OSStartFlag_POR             * 1:SHL:0   ; Power-On Reset
OSStartFlag_NoCMOSReset     * 1:SHL:1	; CMOS reset inhibited (protection link etc)
OSStartFlag_CMOSReset       * 1:SHL:2	; CMOS reset (if POR and not inhibited)
OSStartFlag_NoCMOS  	    * 1:SHL:3	; There's no real NVRAM, only cache
OSStartFlag_RAMCleared      * 1:SHL:4   ; RAM has been cleared to zero

                END