Increase number of vectors supported by the kernel to 96.

Version 6.03. Tagged as 'Kernel-6_03'

Increase number of vectors supported by the kernel to 96.
Version 6.03. Tagged as 'Kernel-6_03'
b05cb85a · Ben Avison · 38d3d82a · b05cb85a · b05cb85a · b05cb85a
Commit b05cb85a authored Apr 19, 2018 by Ben Avison
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Showing with 68 additions and 25 deletions

VersionASM VersionASM +6 -6

VersionNum VersionNum +10 -10

hdr/KernelWS hdr/KernelWS +1 -1

hdr/RISCOS hdr/RISCOS +1 -4

s/ArthurSWIs s/ArthurSWIs +50 -4

No files found.
--- a/VersionASM
+++ b/VersionASM
@@ -11,13 +11,13 @@
                        GBLS    Module_HelpVersion
                        GBLS    Module_ComponentName
                        GBLS    Module_ComponentPath
-Module_MajorVersion     SETS    "6.02"
-Module_Version          SETA    602
+Module_MajorVersion     SETS    "6.03"
+Module_Version          SETA    603
 Module_MinorVersion     SETS    ""
-Module_Date             SETS    "15 Apr 2018"
-Module_ApplicationDate  SETS    "15-Apr-18"
+Module_Date             SETS    "19 Apr 2018"
+Module_ApplicationDate  SETS    "19-Apr-18"
 Module_ComponentName    SETS    "Kernel"
 Module_ComponentPath    SETS    "castle/RiscOS/Sources/Kernel"
-Module_FullVersion      SETS    "6.02"
-Module_HelpVersion      SETS    "6.02 (15 Apr 2018)"
+Module_FullVersion      SETS    "6.03"
+Module_HelpVersion      SETS    "6.03 (19 Apr 2018)"
                        END
--- a/VersionNum
+++ b/VersionNum
-/* (6.02)
+/* (6.03)
 *
 * This file is automatically maintained by srccommit, do not edit manually.
 * Last processed by srccommit version: 1.1.
 *
 */
-#define Module_MajorVersion_CMHG        6.02
+#define Module_MajorVersion_CMHG        6.03
 #define Module_MinorVersion_CMHG        
-#define Module_Date_CMHG                15 Apr 2018
+#define Module_Date_CMHG                19 Apr 2018

-#define Module_MajorVersion             "6.02"
-#define Module_Version                  602
+#define Module_MajorVersion             "6.03"
+#define Module_Version                  603
 #define Module_MinorVersion             ""
-#define Module_Date                     "15 Apr 2018"
+#define Module_Date                     "19 Apr 2018"

-#define Module_ApplicationDate          "15-Apr-18"
+#define Module_ApplicationDate          "19-Apr-18"

 #define Module_ComponentName            "Kernel"
 #define Module_ComponentPath            "castle/RiscOS/Sources/Kernel"

-#define Module_FullVersion              "6.02"
-#define Module_HelpVersion              "6.02 (15 Apr 2018)"
-#define Module_LibraryVersionInfo       "6:2"
+#define Module_FullVersion              "6.03"
+#define Module_HelpVersion              "6.03 (19 Apr 2018)"
+#define Module_LibraryVersionInfo       "6:3"
--- a/hdr/KernelWS
+++ b/hdr/KernelWS
@@ -1393,7 +1393,7 @@ VecPtrTab          #  NVECTORS * 4

 ExceptionDump      #  4

-OldGeneralMOSBuffer # 256+4      ;spare
+ # 68                       ; spare

 [ :DEF: ShowWS
 ! 0,"16 ":CC::STR:@

--- a/hdr/RISCOS
+++ b/hdr/RISCOS
@@ -273,10 +273,7 @@ GraphicsV *     &2A                     ; indirection of graphics system from Ke
 UnthreadV *     &2B                     ; high-priority callbacks
 SeriousErrorV * &2D                     ; an exception occurred which could only be handled by flattening the privileged mode stacks

-SpareVector2 *  &2E
-SpareVector1 *  &2F
-
-NVECTORS *      SpareVector1 + 1        ; There are this many vectors, 0..NVECTORS-1
+NVECTORS *      96                      ; There are this many vectors, 0..NVECTORS-1

        ; Buffer indices


--- a/s/ArthurSWIs
+++ b/s/ArthurSWIs
@@ -587,12 +587,58 @@ defaultvectab
   & 0, 0, NaffVector           ; &29
   & 0, ZeroPage+VduDriverWorkSpace, MOSGraphicsV  ; GraphicsV * &2a
   & 0, 0, NaffVector           ; UnthreadV * &2b
-   & 0, 0, NaffVector           ; SeriousErrorV * &2c
-
- ; the spares
-   & 0, 0, NaffVector           ; &2d
+   & 0, 0, NaffVector           ; &2c
+   & 0, 0, NaffVector           ; SeriousErrorV * &2d
   & 0, 0, NaffVector           ; &2e
   & 0, 0, NaffVector           ; &2f
+   & 0, 0, NaffVector           ; &30
+   & 0, 0, NaffVector           ; &31
+   & 0, 0, NaffVector           ; &32
+   & 0, 0, NaffVector           ; &33
+   & 0, 0, NaffVector           ; &34
+   & 0, 0, NaffVector           ; &35
+   & 0, 0, NaffVector           ; &36
+   & 0, 0, NaffVector           ; &37
+   & 0, 0, NaffVector           ; &38
+   & 0, 0, NaffVector           ; &39
+   & 0, 0, NaffVector           ; &3A
+   & 0, 0, NaffVector           ; &3B
+   & 0, 0, NaffVector           ; &3C
+   & 0, 0, NaffVector           ; &3D
+   & 0, 0, NaffVector           ; &3E
+   & 0, 0, NaffVector           ; &3F
+   & 0, 0, NaffVector           ; &40
+   & 0, 0, NaffVector           ; &41
+   & 0, 0, NaffVector           ; &42
+   & 0, 0, NaffVector           ; &43
+   & 0, 0, NaffVector           ; &44
+   & 0, 0, NaffVector           ; &45
+   & 0, 0, NaffVector           ; &46
+   & 0, 0, NaffVector           ; &47
+   & 0, 0, NaffVector           ; &48
+   & 0, 0, NaffVector           ; &49
+   & 0, 0, NaffVector           ; &4A
+   & 0, 0, NaffVector           ; &4B
+   & 0, 0, NaffVector           ; &4C
+   & 0, 0, NaffVector           ; &4D
+   & 0, 0, NaffVector           ; &4E
+   & 0, 0, NaffVector           ; &4F
+   & 0, 0, NaffVector           ; &50
+   & 0, 0, NaffVector           ; &51
+   & 0, 0, NaffVector           ; &52
+   & 0, 0, NaffVector           ; &53
+   & 0, 0, NaffVector           ; &54
+   & 0, 0, NaffVector           ; &55
+   & 0, 0, NaffVector           ; &56
+   & 0, 0, NaffVector           ; &57
+   & 0, 0, NaffVector           ; &58
+   & 0, 0, NaffVector           ; &59
+   & 0, 0, NaffVector           ; &5A
+   & 0, 0, NaffVector           ; &5B
+   & 0, 0, NaffVector           ; &5C
+   & 0, 0, NaffVector           ; &5D
+   & 0, 0, NaffVector           ; &5E
+   & 0, 0, NaffVector           ; &5F

 assert (.-defaultvectab) = NVECTORS*VecNodeSize