diff --git a/VersionASM b/VersionASM index 36806b475c008f8a6bbd5769c4ce7ae2d752aea5..3cdf7c696cbed5e39191fc6bf3d18eea51074f6d 100644 --- a/VersionASM +++ b/VersionASM @@ -13,11 +13,11 @@ GBLS Module_ComponentPath Module_MajorVersion SETS "5.35" Module_Version SETA 535 -Module_MinorVersion SETS "4.79.2.172" -Module_Date SETS "10 Oct 2012" -Module_ApplicationDate SETS "10-Oct-12" +Module_MinorVersion SETS "4.79.2.173" +Module_Date SETS "14 Oct 2012" +Module_ApplicationDate SETS "14-Oct-12" Module_ComponentName SETS "Kernel" Module_ComponentPath SETS "castle/RiscOS/Sources/Kernel" -Module_FullVersion SETS "5.35 (4.79.2.172)" -Module_HelpVersion SETS "5.35 (10 Oct 2012) 4.79.2.172" +Module_FullVersion SETS "5.35 (4.79.2.173)" +Module_HelpVersion SETS "5.35 (14 Oct 2012) 4.79.2.173" END diff --git a/VersionNum b/VersionNum index 88263357e9839180faf5cf4b4bf213baee9f6cf6..c3124526bbf6a2a487dcff85cf1d88ea7c75318a 100644 --- a/VersionNum +++ b/VersionNum @@ -5,19 +5,19 @@ * */ #define Module_MajorVersion_CMHG 5.35 -#define Module_MinorVersion_CMHG 4.79.2.172 -#define Module_Date_CMHG 10 Oct 2012 +#define Module_MinorVersion_CMHG 4.79.2.173 +#define Module_Date_CMHG 14 Oct 2012 #define Module_MajorVersion "5.35" #define Module_Version 535 -#define Module_MinorVersion "4.79.2.172" -#define Module_Date "10 Oct 2012" +#define Module_MinorVersion "4.79.2.173" +#define Module_Date "14 Oct 2012" -#define Module_ApplicationDate "10-Oct-12" +#define Module_ApplicationDate "14-Oct-12" #define Module_ComponentName "Kernel" #define Module_ComponentPath "castle/RiscOS/Sources/Kernel" -#define Module_FullVersion "5.35 (4.79.2.172)" -#define Module_HelpVersion "5.35 (10 Oct 2012) 4.79.2.172" +#define Module_FullVersion "5.35 (4.79.2.173)" +#define Module_HelpVersion "5.35 (14 Oct 2012) 4.79.2.173" #define Module_LibraryVersionInfo "5:35" diff --git a/s/ARMops b/s/ARMops index 9c318dab8526839a8dc1efc2dd053caf0636ae71..18edf5a6be77c973516692fbef0960c77844cd9d 100644 --- a/s/ARMops +++ b/s/ARMops @@ -1278,6 +1278,7 @@ IMB_Range_WB_CR7_LDa ROUT BLO %BT10 MOV a1, #0 MCR p15, 0, a1, c7, c10, 4 ; drain WBuffer + MCR p15, 0, a1, c7, c5, 6 ; flush branch predictors Pull "pc" MMU_Changing_WB_CR7_LDa ROUT @@ -1302,6 +1303,7 @@ MMU_ChangingEntry_WB_CR7_LDa ROUT BLO %BT10 MOV lr, #0 MCR p15, 0, lr, c7, c10, 4 ; drain WBuffer + MCR p15, 0, a1, c7, c5, 6 ; flush branch predictors SUB a1, a1, #PageSize MCR p15, 0, a1, c8, c6, 1 ; invalidate DTLB entry MCR p15, 0, a1, c8, c5, 1 ; invalidate ITLB entry @@ -1328,6 +1330,7 @@ MMU_ChangingEntries_WB_CR7_LDa ROUT BLO %BT10 MOV a1, #0 MCR p15, 0, a1, c7, c10, 4 ; drain WBuffer + MCR p15, 0, a1, c7, c5, 6 ; flush branch predictors MOV a1, lr ; restore start address 20 MCR p15, 0, a1, c8, c6, 1 ; invalidate DTLB entry