; ; Copyright (c) 2012, RISC OS Open Ltd ; All rights reserved. ; ; Redistribution and use in source and binary forms, with or without ; modification, are permitted provided that the following conditions are met: ; * Redistributions of source code must retain the above copyright ; notice, this list of conditions and the following disclaimer. ; * Redistributions in binary form must reproduce the above copyright ; notice, this list of conditions and the following disclaimer in the ; documentation and/or other materials provided with the distribution. ; * Neither the name of RISC OS Open Ltd nor the names of its contributors ; may be used to endorse or promote products derived from this software ; without specific prior written permission. ; ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" ; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ; ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE ; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR ; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF ; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS ; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN ; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE ; POSSIBILITY OF SUCH DAMAGE. ; AREA |ARM$$code|, CODE, READONLY, PIC GET Hdr:ListOpts GET Hdr:Macros GET Hdr:Proc GET Hdr:System GET Hdr:FSNumbers GET Hdr:NewErrors GET Hdr:BCMSupport GET hdr.BCM2835 GET hdr.StaticWS EXPORT VCHIQ_InitDevices IMPORT memcpy MACRO $class HALDeviceField $field, $value LCLS myvalue [ "$value" = "" myvalue SETS "$field" | myvalue SETS "$value" ] ASSERT . - %A0 = HALDevice_$class$field [ ?HALDevice_$class$field = 2 DCW $myvalue ELIF ?HALDevice_$class$field = 4 DCD $myvalue | % ?HALDevice_$class$field ] MEND ; Template for VCHIQ device VCHIQ_Dev 0 HALDeviceField Type, HALDeviceType_Comms + HALDeviceComms_InterProc HALDeviceField ID, HALDeviceID_InterProc_VCHIQ HALDeviceField Location, HALDeviceBus_Sys + HALDeviceSysBus_AHB ; Guess HALDeviceField Version, 1 ; API 0.1 HALDeviceField Description, VCHIQ_Description HALDeviceField Address, 0 HALDeviceField Reserved1, 0 HALDeviceField Activate, VCHIQ_Activate HALDeviceField Deactivate, VCHIQ_Deactivate HALDeviceField Reset, VCHIQ_Reset HALDeviceField Sleep, VCHIQ_Sleep HALDeviceField Device, iDev_ARM_DBell0 HALDeviceField TestIRQ, 0 HALDeviceField ClearIRQ, 0 HALDeviceField Reserved2, 0 VCHIQ HALDeviceField ARMToVCOffset, 0 ; filled in later VCHIQ HALDeviceField VCDoorbell, VCHIQ_VCDoorbell VCHIQ HALDeviceField ARMDoorbell, VCHIQ_ARMDoorbell VCHIQ HALDeviceField InitVC, VCHIQ_InitVC VCHIQ HALDeviceField Flags, 0 ; filled in later ASSERT . - %A0 = HALDevice_VCHIQ_Size VCHIQ_Description = "VCHIQ", 0 ALIGN ; Initialise our HAL devices VCHIQ_InitDevices ROUT Entry ADRL a1, VCHIQDevice ADR a2, VCHIQ_Dev MOV a3, #HALDevice_VCHIQ_Size BL memcpy ADRL a2, VCHIQDevice LDR a1, FB_CacheMode STR a1, [a2, #HALDevice_VCHIQARMToVCOffset] MOV a1, #0 CPUDetect ip ; Raspberry Pi 4 / BCM2838 uses a different page list format to allow ; for a 36bit physical address range ORRHI a1, a1, #VCHIQFlag_Use36bitAddrs STR a1, [a2, #HALDevice_VCHIQFlags] MOV a1, #0 MOV lr, pc LDR pc, OSentries+4*OS_AddDevice EXIT VCHIQ_Activate MOV a1, #1 VCHIQ_Deactivate VCHIQ_Reset MOV pc, lr VCHIQ_Sleep MOV a1, #0 MOV pc, lr VCHIQ_VCDoorbell DoMemBarrier a2 LDR a2, =:INDEX:PeriBase - :INDEX:VCHIQDevice LDR a1, [a1, a2] MOV a2, #0 ADD a1, a1, #MB_Base STR a2, [a1, #MB_DBell2] DoMemBarrier a2 MOV pc, lr VCHIQ_ARMDoorbell DoMemBarrier a2 LDR a2, =:INDEX:PeriBase - :INDEX:VCHIQDevice LDR a1, [a1, a2] ADD a1, a1, #MB_Base LDR a1, [a1, #MB_DBell0] DoMemBarrier a2 MOV pc, lr VCHIQ_InitVC ; in: a1 = HAL device ptr ; a2 = ARM phys addr of VCHIQ buffer ; Write to the VCHIQ mailbox channel to let the VC know about the buffer Entry "sb" LDR a3, =:INDEX: VCHIQDevice SUB sb, a1, a3 LDR a1, FB_CacheMode ADD a1, a1, a2 ADD a1, a1, #MB_Chan_VCHIQ ; VCHIQ message doesn't generate a response through the mailbox system, so just fire and forget DoMemBarrier r3 LDR r3, PeriBase ADD r3, r3, #MB_Base ; check we can send a message 001 LDR r2,[r3, #MB_Sta] TST r2, #MB_Sta_Full BNE %BT001 ; write channel full ; send message STR a1,[r3, #MB_ChWr] DoMemBarrier r3 EXIT END