- 18 Feb, 2020 1 commit
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Jeffrey Lee authored
* Requires 'enable_gic=1' in config.txt (or Pi4 dtb to be present?) * IRQs are managed via the GIC, FIQs via the BCM2838 FIQ controller * Implemented in s.IntVC6 to avoid making s.Interrupts too confusing. * Previous VC6 interrupt support removed from s.Interrupts * From the OS's perspective, interrupt numbers mostly remain unchanged. However iDev_QA7 interrupts are unavailable, and some of the BCM2838 interrupts have been overlaid ontop of them. * Device drivers must take care to issue HAL_IRQClear, as that is a new requirement for this HAL
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- 07 Jul, 2018 1 commit
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Jeffrey Lee authored
Detail: hdr/StaticWS - Reserve workspace for QA7 peripheral address, HAL-wide spinlock, and doorbell device Makefile, s/DBell - Add doorbell device implementation hdr/BCM2835 - Clean up dead macros, add new macros for spinlock claim/release and basic CPU detection. Define new IRQ numbers for the "QA7" peripheral. hdr/CastleMacros, s/Top - Generate two HAL descriptors and entry point tables: One for single-core machines and one for multi-core machines. This avoids some MP-related overheads on ARM11 models of Pi. Implement SMP HAL entry points. s/Interrupts - Add support for the QA7 interrupts. Although some interrupts can be flexibly routed to different cores, we currently stick with a static scheme. s/Messaging - Use CPUDetect macro Admin: Untested Requires Kernel-6_09 Version 0.76. Tagged as 'BCM2835-0_76'
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- 09 Sep, 2017 1 commit
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ROOL authored
Detail: Add keyboard scan code with list of modules that the kernel needs to do the same. Reorder the HALEntries to match Kernel-5_89. Remove unused stub functions (now KbdScan exists). Admin: Submission for USB bounty. Version 0.72. Tagged as 'BCM2835-0_72'
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- 15 Nov, 2015 1 commit
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Jeffrey Lee authored
Detail: Makefile, s/Touch - Basic HAL device for the official touchscreen, which just exposes the address of the buffer which the GPU periodically fills with a register dump of the touchscreen controller. hdr/BCM2835 - Remove old comment. Add new tag for getting the touchscreen buffer address. hdr/StaticWS - Remove old workspace entries. Add new entries for touchscreen. s/Messaging - Remove the messagebox tags which set a screen mode on startup (BCMVideo will handle that for us), and just blank the screen instead (to stop the GPU displaying a coloured square). Add tag to get the touchscreen buffer address. s/Top - Register touchscreen HAL device during HAL_InitDevices. Remove more old code. Admin: Tested on Raspberry Pi 1 B Version 0.50. Tagged as 'BCM2835-0_50'
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- 26 Jul, 2015 1 commit
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Jeffrey Lee authored
Detail: s/SPI - Basic HAL devices for the 3 SPI controllers. These expose the register addresses & IRQ numbers, and (for SPI1 & SPI2) deal with enabling/disabling the hardware and the shared IRQ line. GPIO mapping currently isn't dealt with - we don't know which pin group to use (SPI0 can use two different sets on the compute) or how many chip select lines are desired. Makefile - Add SPI source hdr/BCM2835 - Add aux SPI registers hdr/StaticWS - Reserve workspace for the HAL devices s/Top - Register new devices in HAL_InitDevices Admin: Tested on Raspberry Pi B & 2 B Version 0.45. Tagged as 'BCM2835-0_45'
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- 19 Dec, 2013 1 commit
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Jeffrey Lee authored
Detail: CJE's RTC module uses a DS1307-compatible RTC chip similar to the one used in the Iyonix. Previously the kernel handled talking to it, but now that low-level RTC handling has been moved out of the kernel we need an RTC HAL device in the BCM2835 HAL instead. s/RTC - A copy of s.RTC from the Tungsten HAL, relicensed as BSD with permission from Rob Sprowson Makefile, hdr/StaticWS, s/Top - Additional changes needed to hook the code into the HAL Admin: Tested on Raspberry Pi, but without an RTC module fitted However the similarity of the clock chip to the one in the Iyonix should mean there's little chance of this code failing to work correctly when an RTC is fitted Version 0.31. Tagged as 'BCM2835-0_31'
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- 02 Sep, 2012 1 commit
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Jeffrey Lee authored
Detail: Makefile, s/Display - Deleted on-screen debug code hdr/BCM2835, hdr/StaticWS, s/IIC, s/Messaging, s/Stubs, s/Top, s/UART - Strip out calls to on-screen debug code, and a few bits of video code s/Video - Video code removed and replaced with stub functions similar to other HALs. Only remaining useful code is HAL_Video_StartupMode, which in time should probably be moved to BCMVideo as well. Admin: Tested on Raspberry Pi with high processor vectors Version 0.21. Tagged as 'BCM2835-0_21'
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- 28 Aug, 2012 1 commit
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Ben Avison authored
Detail: Implementation of the high-level HAL IIC interface provided by Dave Higton. Admin: Checked it builds and runs at ROOL. Version 0.20. Tagged as 'BCM2835-0_20'
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- 02 Aug, 2012 1 commit
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Jeffrey Lee authored
Add GPIO & VCHIQ HAL devices. Fix FlushDataCache macro to perform a clean & invalidate instead of just an invalidate. Detail: s/GPIO - Basic implementation of the GPIO HAL device to allow the GPIO module to detect the board type s/VCHIQ, hdr/StaticWS - New VCHIQ HAL device which exposes the functionality required by the work-in-progress VCHIQ driver. Makefile, s/Top - Hook up the new files/devices hdr/BCM2835 - Make the FlushDataCache macro perform a clean & invalidate, to match the behaviour of FlushDataCacheRange Admin: Tested on Raspberry Pi with high processor vectors Version 0.17. Tagged as 'BCM2835-0_17'
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- 19 Jul, 2012 1 commit
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John Ballance authored
Detail: HAL_Reset now causes a complete reboot of the machiine. It isnt yet properly called from the kernel.. I've not investigated why yet. Behaviour tested using OS_Hardware call HAL_MachineID, with the github start.elf from 18 July 2012 will provide a valid MAC address .. i.e. that specific to this machine. The a1 value in HAL_ExtendedID needs to be set 0 for this to be reported by OS_ReadSysInfo .. unfortunately, again at this stage, it stalls the boot when set 0, so just for now the committed value for a1 in HAL_ExtendedID is not 0 . centralised messaging routine added. This is used a fair bit in acquiring the operating environment Not yet used in the DMA stuff. probably ought to be. At present the messaging channel this mainly handles is not complete, so information from this code is still WIP Admin: (highlight level of testing that has taken place) (bugfix number if appropriate) Version 0.14. Tagged as 'BCM2835-0_14'
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- 07 Jul, 2012 1 commit
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Jeffrey Lee authored
Detail: s/DMA, hdr/DMA, Makefile - DMA driver, as an implementation of the DMA controller and list type DMA channel HAL devices hdr/StaticWS - Added DMA workspace definition hdr/BCM2835 - Removed DMA control block definition (now in hdr/DMA). Add definitions for the mailbox property interface, which should be supported by the GPU firmware sometime soon. s/Top - Export a couple of the debug functions. Store logical & physical address of NCNB workspace instead of hackily getting phys addr of the (cacheable) HAL workspace. Call DMA_InitDevices in HAL_InitDevices. Admin: Tested in BCM2835 ROM DMA driver hasn't received large amounts of testing, lacks support for finite-length circular transfers, and currently only has one DMA channel enabled More DMA channels should be available once the mailbox property interface is functional and we know which channels the GPU does and doesn't use. Version 0.11. Tagged as 'BCM2835-0_11'
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- 15 Jun, 2012 1 commit
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Ben Avison authored
Detail: * Bugfix to HAL_FIQDisableAll - it wasn't clearing the FIQ register (would only have caused trouble in practice if the same device was subsequently enabled as an IRQ). * Added a load of memory barriers to s.Interrupts and s.Timers to conform to the requirement stated in 1.3 of the datasheet. * Added a HAL device for the Arasan SDHCI controller. Note that this does not currently work reliably, and results vary from card to card. High speed support is currently disabled until we are able to verify that it works reliably. * Added a sprinkling of "GET Hdr:ListOpts" because the space reserved for the SDHCI HAL device in hdr.StaticWS is determined by including Hdr:HALDevice and Hdr:SDHCIDevice, which need it. * When support for saving "CMOS" to the SD card is added, the ROM image file (kernel.img) is the only one we can count on the bootloader installing in memory, so I think we're going to have to work using the table in s.CMOS. Broadcom seems to like messing around with the space just after the processor vector table, so rather than adding a pointer to the table there, I've opted to mark it using a magic word. Admin: Tested on a Raspberry Pi - as noted above, there are reliability issues. Version 0.09. Tagged as 'BCM2835-0_09'
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- 23 May, 2012 1 commit
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Ben Avison authored
Detail: * Moved interrupt and timer code out of s.Stubs - they're not stubs any more. * Rewrote timer and counter code to use GPU system timer 1 for our Timer0 rather than the ARM timer. This is recommended in the Broadcom datasheet because it's driven from the APB clock and so its speed will vary in reduced or low power mode. * HAL_CounterDelay now, well, does a delay! * Added a Timer1, driven from GPU system timer 3 - common code with Timer0. * Reshuffled device numbers so the GPU interrupts are at the bottom. This works better for FIQs and makes Timer0 the lowest priority interrupt. * Higher device numbers are now consistently treated as higher priority. * Stopped using bits 8-31 of the basic interrupt registers. These can't be masked, so they cause the kernel to lock up if generated, which happens if the GPU interrupt which they alias is generated (which appears to include the timers even though this is not documented). * Added definitions for all the interrupts, including those redacted from the datasheet - we need them at least for timers, USB and SD. * Stopped HAL_IRQClear from doing anything - this interrupt controller doesn't do latching. To acknowledge timer interrupts, you should use HAL_TimerIRQClear (and HAL_IRQClear too for compatibility with other ports). * Implemented HAL_IRQStatus and all the FIQ control routines. * Offsets to interrupt controller registers now use symbolic names. * Replaced some hard spaces in sources with normal ones. Admin: Tested on a beta Raspberry Pi. Confirmed that interrupt handlers for both ARM and GPU sources can both be operational simultaneuosly. However, the FIQ code has not been tested. Timer0 is verified as running at the correct speed and reporting a count *down* in the correct range (not a count up as some previous versions did). HAL_CounterDelay appears correct also. Version 0.04. Tagged as 'BCM2835-0_04'
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- 10 May, 2012 1 commit
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Ben Avison authored
Detail: Covers the basic functionality, but does require a customised start.elf to function. The vast majority is an entirely new implementation and is BSD licenced, but 4% (the Makefile and a handful of simple macros) are copied from pre-existing Castle-licenced code, so it lives under the "mixed" hierarchy. If other HALs are anything to go by, we'll end up having to add more Castle code (at least some C runtime functions) so it's probably juast as well. Admin: Code received from Adrian Lees
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