GitLab

In HAL_QueryPlatform a mixture of register naming overlooks r6 (aka v3) gets used, but not preserved.
Uppercase opcodes, add a few more comments around the CRC calculation.

Some misleading notes about IIC0, and other minor clarifications.

Detail:
  Move the register accesses for GPIO to the HAL, since they are hardware specific.
  Add recognition of board types for Pi 3, Compute module 3, rev 3 Pi 0's, and the newer Pi 2's with BCM2837 on them.
Admin:
  Based in part on a submission from Tank.
  Tested on a Pi 2. Requires corresponding GPIO module (tag GPIO-1_00-1_11_2_1 or later).

Version 0.67. Tagged as 'BCM2835-0_67'

Detail:
  hdr/BCM2835 - Add switch to allow GPIOs 22-27 to be reconfigured for ARM JTAG access
  s/Top - Configure GPIOs for JTAG if switch enabled
  s/GPIO - Disable GPIO HAL device if JTAG enabled (try and avoid any software messing with the pins)
Admin:
  Tested on Raspberry Pi 1 B, B+


Version 0.66. Tagged as 'BCM2835-0_66'

Detail:
  s/Top - Update internal HAL debug functions to preserve all the required registers; the new HAL_Debug / UART function implementations corrupt more of the caller-save registers than the old ones did
Admin:
  Tested on Raspberry Pi


Version 0.65. Tagged as 'BCM2835-0_65'

Detail:
  Look at the reset status register and use the HADPOR flag to influence the OSStartFlag_POR value.
  Fixes problem of OS_Byte 253 always reporting a hard reset, never a power on reset.
Admin:
  Tested on a Pi 2.
  Submission for USB bounty.

Version 0.64. Tagged as 'BCM2835-0_64'

Detail:
  s/UART - Update HAL_UARTReceiveByte to clear error IRQs when the FIFO is believed to be empty. Disable IRQs in some complex routines to prevent any re-entrancy issues, and also clear the RX threshold IRQ when flushing the FIFOs or adjusting the threshold level.
Admin:
  Tested on Raspberry Pi 1
  Resolves ticket #429


Version 0.63. Tagged as 'BCM2835-0_63'

Detail:
  Useful if not just SDIO can see the definitions.

Version 0.62. Tagged as 'BCM2835-0_62'

The Pi is unusual in self modifying the ROM image when a CMOS setting was changed (due to there being none on the PCB), with the potential of ending up with a corrupt OS image on disc.
Remove this code and emulate the CMOS using normal RAM, and using the Pi firmware to load the CMOS file in for us (like fatload does on OMAP based designs) by using its ability to load a second arbitrary file at an address, intended in the Linux world to load a disc image.

To use this you will need to add
  ramfsfile=CMOS
  ramfsaddr=0x508000
to config.txt which loads it 5MB (ie. ImageSize) above the default load address (&8000), though as noted in the changes to BCM2835-0_60 we don't really need to load at offset &8000 but generally do since that's the Pi firmware's default.

hdr/StaticWS:
New workspace to hold our CMOS copy.
CMOS.s:
Remove the 2k magic block, add a simple bytewise copy loop implementation.
SDIO.s:
Extend ADR range.
Top.s:
Copy what the Pi firmware loads somewhere safe until the MMU is on, then copy it back (converting from logical to physical order along the way).
Change other values recovered from pre-MMU times using advanced post indexed addressing technology (TM) rather than switching around sb a lot.

Tested on a Pi 3, with and without an initial CMOS file present.

Version 0.61. Tagged as 'BCM2835-0_61'

IIC.s/Stubs.s:
Don't import workspace when it's not used
Top.s:
Move the dead loops to just after the vectors. In practice these are ineffectual because the firmware (now) loads the image at &8000 to please Linux, so we're mostly wasting our time producing ROM images with vectors at the start.
Pad image to &8000 so it can be loaded at 0 (using Kernel_Old=1 in config.txt) or &8000 (default).
Line up/capitalise a few stray mnemonics, use APCS register naming.
Call HAL_DebugTXStrInline for "HAL Init completed" rather than an inline loop, since earlier in the same function we called HAL_DebugTXStrInline happily.

Version 0.60. Tagged as 'BCM2835-0_60'

Detail:
  hdr/BCM2835, hdr/StaticWS, s/Debug, s/Top, s/Video - Fix up the two serial debug switches to work correctly. Disable debug by default.
  s/UART, hdr/UART - Implement HAL UART API, for the PL011 UART.
Admin:
  Tested on Raspberry Pi 1 B
  Requires DualSerial 0.25 to work correctly


Version 0.59. Tagged as 'BCM2835-0_59'

Detail:
  s/SDIO - Add a GET of Hdr:CPU.Arch, as it's now required for use of the DivRem macro
Admin:
  Tested on Raspberry Pi


Version 0.58. Tagged as 'BCM2835-0_58'

Detail:
  s/SDIO - Signed counter wrap-around once &80007fff was reached was causing the code to think the activity LED was permanently off, resulting in the code only making "turn on" requests. Calculating the difference as a (signed) 16bit value solves the problem.
Admin:
  Tested on Pi 3 B
  Fixes SD activity LED being stuck on after e.g. letting Verify run for a few seconds.


Version 0.57. Tagged as 'BCM2835-0_57'

Detail:
  s/Top - Fix cores sat in the holding pattern waiting on a write to the wrong address. Also, set up lr so we can return to the holding pattern if desired.
Admin:
  Tested on Pi 3 B
  Now possible to launch simple code sequences on the other cores


Version 0.56. Tagged as 'BCM2835-0_56'

Detail:
  s/Top - On multi-core chips, the ARM boot stub has the other cores sat waiting in a loop near &0. Clearing RAM will inadvertantly break them out of this and most likely cause random crashes later on, so inbetween relocating the ROM and clearing RAM make sure we put the cores into a sleep loop in the HAL. Further mailbox writes can then be used to break them out of this loop, using a similar scheme to that used to break them out of the boot stub loop.
  hdr/BCM2835 - Add some register definitions from the BCM2836 docs
Admin:
  Tested on Pi 2B, 3B
  Not currently dealing with kernel_old=1 case where all cores enter the ROM on startup


Version 0.55. Tagged as 'BCM2835-0_55'

Detail:
  hdr/BCM2835 - Remove mailbox definitions - use the ones exported by BCMSupport to avoid needless duplication
  hdr/StaticWS, s/Messaging, s/Top - Use the mailbox property interface to request & map in the virtual GPIO buffer (if present)
  s/SDIO - On the Pi 3B, the GPIO that was used for the SD activity GPIO is now used for a different purpose. To control the activity LED we need to go via an I2C attached GPIO extender, which itself is exposed to the ARM via the new "virtual GPIO" buffer
  s/VCHIQ - Update to use BCMSupport mailbox definitions
Admin:
  Tested on Pi 1B, 3B


Version 0.54. Tagged as 'BCM2835-0_54'

Detail:
  s/IIC - Only adjust the pin mux settings for the pins + IIC controller which we're using, the other pins/controllers might be being used for another purpose (on Pi 3 GPIO0/SDA0 seems related to power control/under-voltage detection)
Admin:
  Tested on Pi 3
  Fixes constant rainbow square (under-volt warning) shown by firmware and inability to scale clock speed above default


Version 0.53. Tagged as 'BCM2835-0_53'

Detail:
  s/Messaging - Ensure the PL011 UART module clock is set to 3MHz on startup, in order to allow the debug terminal to work
  hdr/StaticWS, s/Top - Add a basic HAL device to expose the GPU mailboxes
Admin:
  Tested on Raspberry Pi 1B/2B/3B
  Fixes garbled debug terminal input/output on Pi 3


Version 0.52. Tagged as 'BCM2835-0_52'

Detail:
  s/Stubs, s/Top - Remove references to deleted HAL ATA calls
  s/GPIO, s/Top - Add implementation of HAL_PlatformName. Located in s/GPIO to allow easy re-use of the board revision table.
Admin:
  Tested on Pi 2 Model B


Version 0.51. Tagged as 'BCM2835-0_51'

Detail:
  Makefile, s/Touch - Basic HAL device for the official touchscreen, which just exposes the address of the buffer which the GPU periodically fills with a register dump of the touchscreen controller.
  hdr/BCM2835 - Remove old comment. Add new tag for getting the touchscreen buffer address.
  hdr/StaticWS - Remove old workspace entries. Add new entries for touchscreen.
  s/Messaging - Remove the messagebox tags which set a screen mode on startup (BCMVideo will handle that for us), and just blank the screen instead (to stop the GPU displaying a coloured square). Add tag to get the touchscreen buffer address.
  s/Top - Register touchscreen HAL device during HAL_InitDevices. Remove more old code.
Admin:
  Tested on Raspberry Pi 1 B


Version 0.50. Tagged as 'BCM2835-0_50'

Detail:
  * Recent versions of the firmware call the ROM's entry point in HYP mode
    (except for ARM11 boards which don't have it). Detect this eventuality
    and drop into SVC mode safely if so.
  * Whilst testing this fix, I discovered that occasionally, secondary CPUs
    seem to be being woken up, and start executing the ROM entry point also.
    This shouldn't be happening, but for safety's sake, I'm detecting this
    eventuality and putting any secondary CPUs into a sleep loop.
Admin:
  Tested on Pi 1 and 2. Requires HdrSrc 2.56.

Version 0.49. Tagged as 'BCM2835-0_49'

Hdr:GPIODevice is already included via StaticWS.

Version 0.48. Tagged as 'BCM2835-0_48'

Detail:
  s/DMA - Although there are already plenty of memory barriers present to deal with the BCM2835's dodgy peripheral interface, code examination suggests one extra barrier is needed to make sure things will work correctly once the default NCB cache policy is Normal, non-cacheable rather than Device.
Admin:
  Tested on Raspberry Pi 1


Version 0.47. Tagged as 'BCM2835-0_47'

Detail:
  hdr/StaticWS, s/Top - Removed code to map in all of VC memory. Currently nothing needs it, and the code was broken anyway (debug output would corrupt a1 value given to OS_MapInIO)
Admin:
  Tested on Raspberry Pi


Version 0.46. Tagged as 'BCM2835-0_46'

Detail:
  s/SPI - Basic HAL devices for the 3 SPI controllers. These expose the register addresses & IRQ numbers, and (for SPI1 & SPI2) deal with enabling/disabling the hardware and the shared IRQ line. GPIO mapping currently isn't dealt with - we don't know which pin group to use (SPI0 can use two different sets on the compute) or how many chip select lines are desired.
  Makefile - Add SPI source
  hdr/BCM2835 - Add aux SPI registers
  hdr/StaticWS - Reserve workspace for the HAL devices
  s/Top - Register new devices in HAL_InitDevices
Admin:
  Tested on Raspberry Pi B & 2 B


Version 0.45. Tagged as 'BCM2835-0_45'

Note, this scheme remains non future proof as any later model numbers released will be miscategorised as the last table entry.

Version 0.44. Tagged as 'BCM2835-0_44'

Detail:
  hdr/BCM2835 - Errata 814220 states that the Cortex-A7 set/way cache maintenance operations violate the usual operation ordering rules, such that an L2 maintenance operation which is started after an L1 operation may actually complete before it, causing data corruption if the L1 data was to be evicted to the L2 entry. Implement the suggested workaround of performing a DSB when switching cache levels, rather than just at the end of the combined L1+L2 group of operations.
  Also, fix missing 99 label that would have caused a stack imbalance in the unlikely event of encountering a processor with fully coherent caches
Admin:
  Tested on Raspberry Pi 2


Version 0.43. Tagged as 'BCM2835-0_43'

Detail:
  Parses the revision ID bitfield for new-style revisions - should provide
  some level of forward compatibility at last. The equivalent code in s.GPIO
  hasn't been tackled yet, mainly because it requires some thought about how
  best to handle the Compute module (given that the daughter card can be
  plugged into any number of devices, each of which will use GPIO differently).
Admin:
  Tested on Compute module and Pi 2 with latest firmware.

Version 0.42. Tagged as 'BCM2835-0_42'

Detail:
  The board revision scheme has changed since pre-release firmware, so the
  previous version of the SD code would have misidentified a Pi 2 (as well
  as the model A+) as a Compute module. It looks like in future, board
  revisions could be a more meaningful bitfield rather than the order-of-
  release index that's been used up to now, but at this point we can still
  manage with a cunning combination of CMP and TEQ tests. Note that the GPIO
  part of the HAL hasn't yet been updated to be aware of the new board
  revisions.


Version 0.41. Tagged as 'BCM2835-0_41'

Detail:
  * Compute module support consists of eMMC support in the SDHCI driver. The
    eMMC chip on the Compute module only works reliably if under-clocked to
    25 MHz.
  * Pi 1 vs Pi 2 differences are selected at runtime by checking the CPU ID,
    so a single ROM image will work with both boards.
  * Added ARMv7 cache maintenance routine for use on Pi 2.
  * The physical address of the peripherals has moved in Pi 2 to make space
    for the 1 GB of RAM.
  * The ARM physical address space is mapped differently onto the GPU
    address space in Pi 2 because the ARM now uses the L2 cache that comes
    with the Cortex-A7 instead of the GPU's L2 cache.
  * Still waiting for confirmation on the board revision ID that will be
    used for Pi 2, so may require further tweaks for production releases.


Version 0.40. Tagged as 'BCM2835-0_40'

Version 0.39. Tagged as 'BCM2835-0_39'

As the flag bit in HAL_USBControllerInfo isn't set, no need to provide them.
Use symbols from Hdr:HALEntries when building the USB info.
Built, but not tested.


Version 0.38. Tagged as 'BCM2835-0_38'

There doesn't seem to be a pattern emerging for the allocation of board types, so it's likely that this table will need revisiting again in future as moving the catch all "-1" entry along was identifying a Compute module as a B+.
Submission from TankStage.

Version 0.37. Tagged as 'BCM2835-0_37'

Got the IIC transfer data offset wrong, harmless in this HAL since the stack already had to have space for 2 complete transfers.
Not tested.

Version 0.36. Tagged as 'BCM2835-0_36'

Detail:
  The activity GPIO pin has been reassigned and its sense is inverted,
  compared to earlier boards. More importantly, the SD card detect pin has
  been removed entirely, so we need to signal to the SD stack to use its
  new timeout-based state machine (rather than polling for card presence).
Admin:
  Already in use in RC12a.

Version 0.35. Tagged as 'BCM2835-0_35'

Detail:
  hdr/BCM2835, hdr/USB, s/USB - Update HAL_USBControllerInfo to return the MPHI address & IRQ number
  s/Interrupts - Add some missing memory barriers. Change FIQ enable/disable calls to not alter IRQ masking of the interrupt - simplifies the code and avoids any ordering issues with code that switches interrupts between IRQ & FIQ
  s/Timers - Add missing memory barrier
Admin:
  Tested on Raspberry Pi
  Requires Kernel-5_35-4_79_2_227 to build


Version 0.34. Tagged as 'BCM2835-0_34'

Detail:
  Given the complexity of the USB system on the BCM2835, it seems unlikely
  that the HAL keyboard scan will ever be implemented. Not only does this
  mean it doesn't honour any of the CMOS reset or monitor configuration keys,
  but it means the kernel will always attempt to boot the configured
  filing system and drive, irrespective of the *Configure [No]Boot setting,
  after printing "No keyboard present - autobooting". By changing the HAL
  to report a keyboard present but with no keys held down, we at least get
  the [No]Boot option honoured again (even if the Shift key can't be used
  to invert its sense), and have the message suppressed.
Admin:
  Tested on a Raspberry Pi.

Version 0.33. Tagged as 'BCM2835-0_33'

Mark HAL_IICDevice as a null entry, since bit 4 of the flags says we don't support that mode of operation anyway.

Version 0.32. Tagged as 'BCM2835-0_32'

Detail:
  CJE's RTC module uses a DS1307-compatible RTC chip similar to the one used in the Iyonix. Previously the kernel handled talking to it, but now that low-level RTC handling has been moved out of the kernel we need an RTC HAL device in the BCM2835 HAL instead.
  s/RTC - A copy of s.RTC from the Tungsten HAL, relicensed as BSD with permission from Rob Sprowson
  Makefile, hdr/StaticWS, s/Top - Additional changes needed to hook the code into the HAL
Admin:
  Tested on Raspberry Pi, but without an RTC module fitted
  However the similarity of the clock chip to the one in the Iyonix should mean there's little chance of this code failing to work correctly when an RTC is fitted


Version 0.31. Tagged as 'BCM2835-0_31'