GitLab

Just enough pokes to be able to scan configuration space such that the VIA XHCI controller can be seen by PCI Manager. Note: at present there are no memory or IO windows open, so you can't (yet) see XHCI registers.

* Requires 'enable_gic=1' in config.txt (or Pi4 dtb to be present?)
* IRQs are managed via the GIC, FIQs via the BCM2838 FIQ controller
* Implemented in s.IntVC6 to avoid making s.Interrupts too
confusing.
* Previous VC6 interrupt support removed from s.Interrupts
* From the OS's perspective, interrupt numbers mostly remain
unchanged. However iDev_QA7 interrupts are unavailable, and some of
the BCM2838 interrupts have been overlaid ontop of them.
* Device drivers must take care to issue HAL_IRQClear, as that is
a new requirement for this HAL

RAM sizes above 1GB are not reported by the usual mailbox property, and it
seems unlikely that this will change because the VC RAM allocation has to
remain within the bottom 1GB of the address space (the VC still uses the
upper two bits of its addresses for cache policy) and this property cannot
describe a non-contiguous range. Use the board revision bitfield to recognise
when additional general-purpose RAM exists above the VC allocation. For now,
we're running in "low peripherals" mode, so the top 64MB of 4GB RAM machines
is inaccessible. If the VC allocation is also 64MB, that means the startup
banner of Pi 4 will read 960MB, 1984MB or 3968MB.

Also fix HAL_PhysInfo (and by implication, OS_Memory 6 and 7) to report the
full 35-bit physical address space on Pi 4. The `range` struct filled in by
HAL_PhysInfo has not been extended to 64-bit physical addresses because it
describes RAM, and for now at least, RAM just squeezes into 32-bit addresses.

Detail:
* For now, this uses the legacy interrupt controller, whose register layout has
  unfortunately changed in some unhelpful ways. There is also a GICv2 in the
  SoC, which we will need to transition across to in order to use some of the
  newer peripherals (including USB3 and gigabit Ethernet).
* This requires a corresponding set of changes to start.elf: substitute all
  three instances of &E30011E7 with &E3001000.
* FIQs are not currently supported, as the legacy interrupt controller has
  changed how these are handled. It seems likely that we'll transition to
  GIC before too long, which means it's not worth bothering to implement them
  for the legacy interrupt controller.

Because the mini-UART clock is derived from the core clock, and this varies
by hardware platform and even firmware version, move the initial mailbox
read to before UART initialisation so that this information is available.

Also:
* the IO region previously used only for the QA7 extensions now holds a GIC
  as well on Pi 4, so give it a more generic name
* there's a new, second peripheral IO region to map in as well

RISCOS_MapInIO does relatively little processing on the L1PT flags that the
HAL passes to it. However, when modules come along later and try to locate
IO again, using OS_Memory 13, access permissions are specified using a
variation on dynamic area flags. The kernel translates from these to L1PT
flags, and one of the rules it applies is that the shareability bit is set
if on a multiprocessor system. On Pi 2 and later, this means it doesn't find
a match amongst the sections that were mapped in by the HAL, and in practice
this means BCMVideo ends up causing 16MB of IO space to be mapped in twice.

Fix this by passing the L1_S flag to RISCOS_MapInIO on Pi 2 and later. This
effectively frees up an additional 16MB of logical address space for dynamic
areas.

Version 0.81. Tagged as 'HAL_BCM2835-0_81'

Do an upfront check for the model being 0, if that ever changes there's probably something seriously different. Look only at the Board_Revision elsewhere.
Add the other Compute module to the SPI2 check (though currently the checks don't consider "New" revision words).

Version 0.78. Tagged as 'BCM2835-0_78'

Detail:
  hdr/StaticWS - Reserve workspace for QA7 peripheral address, HAL-wide spinlock, and doorbell device
  Makefile, s/DBell - Add doorbell device implementation
  hdr/BCM2835 - Clean up dead macros, add new macros for spinlock claim/release and basic CPU detection. Define new IRQ numbers for the "QA7" peripheral.
  hdr/CastleMacros, s/Top - Generate two HAL descriptors and entry point tables: One for single-core machines and one for multi-core machines. This avoids some MP-related overheads on ARM11 models of Pi. Implement SMP HAL entry points.
  s/Interrupts - Add support for the QA7 interrupts. Although some interrupts can be flexibly routed to different cores, we currently stick with a static scheme.
  s/Messaging - Use CPUDetect macro
Admin:
  Untested
  Requires Kernel-6_09


Version 0.76. Tagged as 'BCM2835-0_76'

Top.s: HAL_UARTStartUp takes 0's based UART numbers, so the debug setup would go wrong (if HAL_UARTStartUp actually checked the value).
UART.s: Re-express the baud register default value so its origin is clear.
Retagged as BCM2835-0_75 as the (non-debug) version is binary identical.

Detail:
  Add keyboard scan code with list of modules that the kernel needs to do the same.
  Reorder the HALEntries to match Kernel-5_89.
  Remove unused stub functions (now KbdScan exists).
Admin:
  Submission for USB bounty.

Version 0.72. Tagged as 'BCM2835-0_72'

Detail:
  Firmware as of 28th July will allow the GPU to make use of the top 16MB of RAM in 1GB machines. This overlaps the ARM's IO space, essentially making that area of memory inaccessible to us.
  This causes problems because we rely on a couple of buffers which are located in VC memory (virtual GPIO buffer & FT5406 touchscreen buffer)
  At some point extra mailbox messages were added to allow the ARM to dictate the location of these buffers; so make use of those messages wherever possible.
  File changes:
  s/Messaging - Remove VirtGPIOBuf and TouchBuf related tags from the initialisation tag sequence. Add new GetVCBuffer function that can be called post-MMU init to deal with getting/setting the buffer addresses.
  s/Top - Use GetVCBuffer to initialise VirtGPIOBuf
  s/Touch - Use GetVCBuffer to get touchscreen buffer
  hdr/StaticWS - Remove TouchBuf from workspace, no longer needed
Admin:
  Tested on Raspberry Pi 3 with firmware from March 2016 (Set commands not supported), 21st July 2017 (set commands supported, but upper 16MB not used), 28th July 2017 (set commands supported and necessary)


Version 0.71. Tagged as 'BCM2835-0_71'

The SDIO HAL device reports when it is sure fixed disc media is attached (ie. eMMC soldered on the same PCB) which causes SDFS to report this to FileCore as a fixed disc, skipping the removable safety checks.
However, CM3 and CM3L both return the same board id so we can't work out which is which. Additionally, someone could attach an external eMMC in theory on a custom expansion board (instead of an SD card socket like the CMIO has).
To resolve this, we assign IO expander line 6 of U8 to be a safety catch. If that line is held low, it signifies this is definitely a CM3 - in effect this is a "definitely has eMMC" or "maybe has eMMC" switch.

Tested on CM1, CM3, CM3L, and a suitably modified CM3 with the help of Chris Hall.

Version 0.69. Tagged as 'BCM2835-0_69'

Remove the baffling double indirection of RamAd (and unused exports SerNo and MacAdd), and treat these the same as the other pre-HAL_Init query results.
This means the scope of the tagbuffer is limited to Messaging.s, rather than having to be kept preserved globally.
Use memcpy() to copy tag list to tagbuffer for clarity.
Tested on a Pi 3.

Version 0.68. Tagged as 'BCM2835-0_68'

Detail:
  hdr/BCM2835 - Add switch to allow GPIOs 22-27 to be reconfigured for ARM JTAG access
  s/Top - Configure GPIOs for JTAG if switch enabled
  s/GPIO - Disable GPIO HAL device if JTAG enabled (try and avoid any software messing with the pins)
Admin:
  Tested on Raspberry Pi 1 B, B+


Version 0.66. Tagged as 'BCM2835-0_66'

Detail:
  s/Top - Update internal HAL debug functions to preserve all the required registers; the new HAL_Debug / UART function implementations corrupt more of the caller-save registers than the old ones did
Admin:
  Tested on Raspberry Pi


Version 0.65. Tagged as 'BCM2835-0_65'

Detail:
  Look at the reset status register and use the HADPOR flag to influence the OSStartFlag_POR value.
  Fixes problem of OS_Byte 253 always reporting a hard reset, never a power on reset.
Admin:
  Tested on a Pi 2.
  Submission for USB bounty.

Version 0.64. Tagged as 'BCM2835-0_64'

The Pi is unusual in self modifying the ROM image when a CMOS setting was changed (due to there being none on the PCB), with the potential of ending up with a corrupt OS image on disc.
Remove this code and emulate the CMOS using normal RAM, and using the Pi firmware to load the CMOS file in for us (like fatload does on OMAP based designs) by using its ability to load a second arbitrary file at an address, intended in the Linux world to load a disc image.

To use this you will need to add
  ramfsfile=CMOS
  ramfsaddr=0x508000
to config.txt which loads it 5MB (ie. ImageSize) above the default load address (&8000), though as noted in the changes to BCM2835-0_60 we don't really need to load at offset &8000 but generally do since that's the Pi firmware's default.

hdr/StaticWS:
New workspace to hold our CMOS copy.
CMOS.s:
Remove the 2k magic block, add a simple bytewise copy loop implementation.
SDIO.s:
Extend ADR range.
Top.s:
Copy what the Pi firmware loads somewhere safe until the MMU is on, then copy it back (converting from logical to physical order along the way).
Change other values recovered from pre-MMU times using advanced post indexed addressing technology (TM) rather than switching around sb a lot.

Tested on a Pi 3, with and without an initial CMOS file present.

Version 0.61. Tagged as 'BCM2835-0_61'

IIC.s/Stubs.s:
Don't import workspace when it's not used
Top.s:
Move the dead loops to just after the vectors. In practice these are ineffectual because the firmware (now) loads the image at &8000 to please Linux, so we're mostly wasting our time producing ROM images with vectors at the start.
Pad image to &8000 so it can be loaded at 0 (using Kernel_Old=1 in config.txt) or &8000 (default).
Line up/capitalise a few stray mnemonics, use APCS register naming.
Call HAL_DebugTXStrInline for "HAL Init completed" rather than an inline loop, since earlier in the same function we called HAL_DebugTXStrInline happily.

Version 0.60. Tagged as 'BCM2835-0_60'

Detail:
  hdr/BCM2835, hdr/StaticWS, s/Debug, s/Top, s/Video - Fix up the two serial debug switches to work correctly. Disable debug by default.
  s/UART, hdr/UART - Implement HAL UART API, for the PL011 UART.
Admin:
  Tested on Raspberry Pi 1 B
  Requires DualSerial 0.25 to work correctly


Version 0.59. Tagged as 'BCM2835-0_59'

Detail:
  s/Top - Fix cores sat in the holding pattern waiting on a write to the wrong address. Also, set up lr so we can return to the holding pattern if desired.
Admin:
  Tested on Pi 3 B
  Now possible to launch simple code sequences on the other cores


Version 0.56. Tagged as 'BCM2835-0_56'

Detail:
  s/Top - On multi-core chips, the ARM boot stub has the other cores sat waiting in a loop near &0. Clearing RAM will inadvertantly break them out of this and most likely cause random crashes later on, so inbetween relocating the ROM and clearing RAM make sure we put the cores into a sleep loop in the HAL. Further mailbox writes can then be used to break them out of this loop, using a similar scheme to that used to break them out of the boot stub loop.
  hdr/BCM2835 - Add some register definitions from the BCM2836 docs
Admin:
  Tested on Pi 2B, 3B
  Not currently dealing with kernel_old=1 case where all cores enter the ROM on startup


Version 0.55. Tagged as 'BCM2835-0_55'

Detail:
  hdr/BCM2835 - Remove mailbox definitions - use the ones exported by BCMSupport to avoid needless duplication
  hdr/StaticWS, s/Messaging, s/Top - Use the mailbox property interface to request & map in the virtual GPIO buffer (if present)
  s/SDIO - On the Pi 3B, the GPIO that was used for the SD activity GPIO is now used for a different purpose. To control the activity LED we need to go via an I2C attached GPIO extender, which itself is exposed to the ARM via the new "virtual GPIO" buffer
  s/VCHIQ - Update to use BCMSupport mailbox definitions
Admin:
  Tested on Pi 1B, 3B


Version 0.54. Tagged as 'BCM2835-0_54'

Detail:
  s/Messaging - Ensure the PL011 UART module clock is set to 3MHz on startup, in order to allow the debug terminal to work
  hdr/StaticWS, s/Top - Add a basic HAL device to expose the GPU mailboxes
Admin:
  Tested on Raspberry Pi 1B/2B/3B
  Fixes garbled debug terminal input/output on Pi 3


Version 0.52. Tagged as 'BCM2835-0_52'

Detail:
  s/Stubs, s/Top - Remove references to deleted HAL ATA calls
  s/GPIO, s/Top - Add implementation of HAL_PlatformName. Located in s/GPIO to allow easy re-use of the board revision table.
Admin:
  Tested on Pi 2 Model B


Version 0.51. Tagged as 'BCM2835-0_51'

Detail:
  Makefile, s/Touch - Basic HAL device for the official touchscreen, which just exposes the address of the buffer which the GPU periodically fills with a register dump of the touchscreen controller.
  hdr/BCM2835 - Remove old comment. Add new tag for getting the touchscreen buffer address.
  hdr/StaticWS - Remove old workspace entries. Add new entries for touchscreen.
  s/Messaging - Remove the messagebox tags which set a screen mode on startup (BCMVideo will handle that for us), and just blank the screen instead (to stop the GPU displaying a coloured square). Add tag to get the touchscreen buffer address.
  s/Top - Register touchscreen HAL device during HAL_InitDevices. Remove more old code.
Admin:
  Tested on Raspberry Pi 1 B


Version 0.50. Tagged as 'BCM2835-0_50'

Detail:
  * Recent versions of the firmware call the ROM's entry point in HYP mode
    (except for ARM11 boards which don't have it). Detect this eventuality
    and drop into SVC mode safely if so.
  * Whilst testing this fix, I discovered that occasionally, secondary CPUs
    seem to be being woken up, and start executing the ROM entry point also.
    This shouldn't be happening, but for safety's sake, I'm detecting this
    eventuality and putting any secondary CPUs into a sleep loop.
Admin:
  Tested on Pi 1 and 2. Requires HdrSrc 2.56.

Version 0.49. Tagged as 'BCM2835-0_49'

Detail:
  hdr/StaticWS, s/Top - Removed code to map in all of VC memory. Currently nothing needs it, and the code was broken anyway (debug output would corrupt a1 value given to OS_MapInIO)
Admin:
  Tested on Raspberry Pi


Version 0.46. Tagged as 'BCM2835-0_46'

Detail:
  s/SPI - Basic HAL devices for the 3 SPI controllers. These expose the register addresses & IRQ numbers, and (for SPI1 & SPI2) deal with enabling/disabling the hardware and the shared IRQ line. GPIO mapping currently isn't dealt with - we don't know which pin group to use (SPI0 can use two different sets on the compute) or how many chip select lines are desired.
  Makefile - Add SPI source
  hdr/BCM2835 - Add aux SPI registers
  hdr/StaticWS - Reserve workspace for the HAL devices
  s/Top - Register new devices in HAL_InitDevices
Admin:
  Tested on Raspberry Pi B & 2 B


Version 0.45. Tagged as 'BCM2835-0_45'

Detail:
  * Compute module support consists of eMMC support in the SDHCI driver. The
    eMMC chip on the Compute module only works reliably if under-clocked to
    25 MHz.
  * Pi 1 vs Pi 2 differences are selected at runtime by checking the CPU ID,
    so a single ROM image will work with both boards.
  * Added ARMv7 cache maintenance routine for use on Pi 2.
  * The physical address of the peripherals has moved in Pi 2 to make space
    for the 1 GB of RAM.
  * The ARM physical address space is mapped differently onto the GPU
    address space in Pi 2 because the ARM now uses the L2 cache that comes
    with the Cortex-A7 instead of the GPU's L2 cache.
  * Still waiting for confirmation on the board revision ID that will be
    used for Pi 2, so may require further tweaks for production releases.


Version 0.40. Tagged as 'BCM2835-0_40'

As the flag bit in HAL_USBControllerInfo isn't set, no need to provide them.
Use symbols from Hdr:HALEntries when building the USB info.
Built, but not tested.


Version 0.38. Tagged as 'BCM2835-0_38'

Mark HAL_IICDevice as a null entry, since bit 4 of the flags says we don't support that mode of operation anyway.

Version 0.32. Tagged as 'BCM2835-0_32'

Detail:
  CJE's RTC module uses a DS1307-compatible RTC chip similar to the one used in the Iyonix. Previously the kernel handled talking to it, but now that low-level RTC handling has been moved out of the kernel we need an RTC HAL device in the BCM2835 HAL instead.
  s/RTC - A copy of s.RTC from the Tungsten HAL, relicensed as BSD with permission from Rob Sprowson
  Makefile, hdr/StaticWS, s/Top - Additional changes needed to hook the code into the HAL
Admin:
  Tested on Raspberry Pi, but without an RTC module fitted
  However the similarity of the clock chip to the one in the Iyonix should mean there's little chance of this code failing to work correctly when an RTC is fitted


Version 0.31. Tagged as 'BCM2835-0_31'

Detail:
  s/Top, s/Video - Removed obsolete HAL video API implementation. A stub implementation is no longer required for systems that have a GraphicsV driver in a module, and can even cause problems if the OS decides to use the HAL implementation instead of the module one.
Admin:
  Tested in BCM2835 ROM
  Requires Kernel-5_35-4_79_2_203


Version 0.30. Tagged as 'BCM2835-0_30'

Detail:
  hdr/BCM2835 - Add definition for highest IRQ number
  s/Boot, s/Interrupts - Added HAL_IRQMax implementation, to ensure correct functionality with latest Kernel
Admin:
  Tested on 256MB Pi model B
  Requires Kernel-5_35-4_79_2_182


Version 0.29. Tagged as 'BCM2835-0_29'

Detail:
  s/Top, s/Video - Renamed HAL_Video entries to match naming convention used by latest kernel
Admin:
  Tested on Raspberry Pi with high processor vectors


Version 0.26. Tagged as 'BCM2835-0_26'

Detail:
  hdr/StaticWS, s/Top, s/Video - Added a simple VDU HAL device that exposes a DMA channel to BCMVideo for use with GraphicsV_Render
  hdr/BCM2835 - Don't allow DMA channel 12 to be used; latest firmware seems to have a bug which claims its free when in reality it isn't.
  s/Messaging, s/DMA - Adjust DMA init to allow the video device to claim a DMA channel before the DMA devices are initialised
Admin:
  Tested on Raspberry Pi with high processor vectors


Version 0.25. Tagged as 'BCM2835-0_25'

Detail:
  s/Top - Added HAL_PhysInfo implementation. Tweaked HAL_Reset to reduce chances of failure.
  s/Stubs - Removed obsolete, unused UART stubs. Use KbdFlag_Done instead of magic number.
Admin:
  Tested on Raspberry Pi


Version 0.23. Tagged as 'BCM2835-0_23'

Read board model, revision, and available DMA channels from messaging channel. Report board revision via GPIO HAL device. Recover lost ROM relocation code.

Detail:
  hdr/StaticWS, s/Messaging, s/Top - Now reads board model, revision and available DMA channels from messaging channel
  hdr/StaticWS, s/GPIO - Updated GPIO HAL device to report board revision instead of a generic response of 'unknown'
  s/Top - Recovered ROM relocation code that got lost during a merge. End of ROM image no longer being corrupted, and RISC OS now sees correct amount of RAM.
  s/DMA - Ditch old code to read available DMA channels and use value read by HAL_QueryPlatform instead.
Admin:
  Tested on Raspberry Pi (B rev 1) with various start.elf sizes & versions
  DMA channel reporting only available with latest firmware (i.e. 8th Sep)
  Board revision number read by messaging channel seems to match that returned by /proc/cpuinfo on Linux


Version 0.22. Tagged as 'BCM2835-0_22'

Detail:
  Makefile, s/Display - Deleted on-screen debug code
  hdr/BCM2835, hdr/StaticWS, s/IIC, s/Messaging, s/Stubs, s/Top, s/UART - Strip out calls to on-screen debug code, and a few bits of video code
  s/Video - Video code removed and replaced with stub functions similar to other HALs. Only remaining useful code is HAL_Video_StartupMode, which in time should probably be moved to BCMVideo as well.
Admin:
  Tested on Raspberry Pi with high processor vectors


Version 0.21. Tagged as 'BCM2835-0_21'