Enable GitLab CI and address issues identified

* Add missing `.gitignore`
* When some BASIC test programs were added, the required update to
  `.gitattributes` was overlooked
* Remove a small number of recent whitespace errors so that future
  introductions of new ones can be automatically detected and flagged

.gitattributes

 hdr/** gitlab-language=armasm linguist-language=armasm linguist-detectable=true
 s/** gitlab-language=armasm linguist-language=armasm linguist-detectable=true
+*,ffb gitlab-language=bbcbasic linguist-language=bbcbasic linguist-detectable=true

.gitignore

+/aif/
+/aof/
+/gpa/
+/i/
+/linked/
+/o/
+/objs/
+/od/
+/rm/

.gitlab-ci.yml

+include:
+  - project: 'Support/CI'
+    file: '/HAL_BCM2835.yml'

s/IntVC6

@@ -137,7 +137,7 @@ GICtoOS
         ADDLO    $irq, $irq, $core, LSL #5
         MEND
 
-; Things the boot stubs do for us: 
+; Things the boot stubs do for us:
 ; https://github.com/raspberrypi/tools/blob/master/armstubs/armstub7.S
 ;
 ; * Set GICD_CTLR to 3 for secondary cores (group 0 + 1 enabled). For the primary core it's not initialised.
@@ -179,7 +179,7 @@ InterruptVC6_Init ROUT
 10
         STR     a1, [a2], #4
         SUBS    a3, a3, #1
-        BNE     %BT10        
+        BNE     %BT10
         ; Set priority & CPU target
         LDR     a1, =&80808080 ; Mid priority
         LDR     a2, =&01010101 ; CPU 0
@@ -304,7 +304,7 @@ VC6_HAL_IRQClear ROUT
 10
         DataSyncBarrier ip           ; After last read, before first write
         STR     a1, [a4, #GICC_EOIR]
-        DSB     SY        
+        DSB     SY
         MOV     pc, lr
 
 VC6_HAL_IRQSource ROUT
@@ -358,7 +358,7 @@ VC6_HAL_IRQStatus ROUT
 ; This implementation only provides access to the interrupts exposed by the
 ; BCM2828 FIQ controller, i.e. iDev_GPU and iDev_ARM. Technically we also have
 ; access to the interrupts from the QA7 controller (BCM2838 FIQ controller is
-; the QA7 "GPU" FIQ?), but the QA7 interrupts aren't very exciting, so for now 
+; the QA7 "GPU" FIQ?), but the QA7 interrupts aren't very exciting, so for now
 ; just ignore them.
 
 VC6_HAL_FIQEnable ROUT

s/Top

@@ -315,7 +315,7 @@ start
         BNE     %BT10
    ]
  ]
-        
+
 
  [ JTAG
         ; Configure the GPIO pins used for JTAG