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Commit a04aae74 authored by Jeffrey Lee's avatar Jeffrey Lee
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Merge latest changes from HEAD 

Version 0.75, 1.70.2.4. Tagged as 'BCM2835-0_75-1_70_2_4'
parent e83ce7be
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VersionNum
View file @ a04aae74
/* (0.73)
/* (0.75)
*
* This file is automatically maintained by srccommit, do not edit manually.
* Last processed by srccommit version: 1.1.
*
*/
#define Module_MajorVersion_CMHG 0.73
#define Module_MinorVersion_CMHG 1.70.2.3
#define Module_Date_CMHG 10 Sep 2017
#define Module_MajorVersion_CMHG 0.75
#define Module_MinorVersion_CMHG 1.70.2.4
#define Module_Date_CMHG 07 Jul 2018
#define Module_MajorVersion "0.73"
#define Module_Version 73
#define Module_MinorVersion "1.70.2.3"
#define Module_Date "10 Sep 2017"
#define Module_MajorVersion "0.75"
#define Module_Version 75
#define Module_MinorVersion "1.70.2.4"
#define Module_Date "07 Jul 2018"
#define Module_ApplicationDate "10-Sep-17"
#define Module_ApplicationDate "07-Jul-18"
#define Module_ComponentName "BCM2835"
#define Module_ComponentPath "mixed/RiscOS/Sources/HAL/BCM2835"
#define Module_FullVersion "0.73 (1.70.2.3)"
#define Module_HelpVersion "0.73 (10 Sep 2017) 1.70.2.3"
#define Module_LibraryVersionInfo "0:73"
#define Module_FullVersion "0.75 (1.70.2.4)"
#define Module_HelpVersion "0.75 (07 Jul 2018) 1.70.2.4"
#define Module_LibraryVersionInfo "0:75"
hdr/BCM2835
View file @ a04aae74
......@@ -283,16 +283,19 @@ $label BIC$cond $startaddr, $startaddr, #&1f
MEND
; Board revision values (pre Pi 2), enumerated scheme
; Ref: http://elinux.org/RPi_HardwareHistory#Board_Revision_History
BoardRevision_AorB256_First * &2 ; } Either an A or B
BoardRevision_AorB256_Last * &9 ; } various manufacturers
BoardRevision_AorB512_First * &D ; } Either an A or B
BoardRevision_AorB512_Last * &F ; } various manufacturers
BoardRevision_AorB_First * &2 ; } Either an A or B, 256MB or 512MB
BoardRevision_AorB_Last * &F ; } and various manufacturers
BoardRevision_BPlus * &10 ; Significant board revisions
BoardRevision_Compute * &11
BoardRevision_APlus * &12
; Ref: https://www.raspberrypi.org/documentation/hardware/raspberrypi/revision-codes/README.md
BoardRevision_AorB256_First * &2 ; } Either an A or B
BoardRevision_AorB256_Last * &9 ; } various manufacturers
BoardRevision_AorB512_First * &D ; } Either an A or B
BoardRevision_AorB512_Last * &F ; } various manufacturers
BoardRevision_AorB_First * &2 ; } Either an A or B, 256MB or 512MB
BoardRevision_AorB_Last * &F ; } and various manufacturers
BoardRevision_BPlus_Sony * &10 ; Significant board revisions
BoardRevision_Compute_Sony * &11
BoardRevision_APlus_Sony * &12
BoardRevision_BPlus_Embest * &13
BoardRevision_Compute_Embest * &14
BoardRevision_APlus_Embest * &15
; Board revision values (Pi 2 and later), bitfield scheme
BoardRevision_User_Shift * 24
......@@ -328,6 +331,8 @@ BoardRevision_Model_Compute * 6 :SHL: BoardRevision_Model_Shift
BoardRevision_Model_B3 * 8 :SHL: BoardRevision_Model_Shift
BoardRevision_Model_Zero * 9 :SHL: BoardRevision_Model_Shift
BoardRevision_Model_Compute3 * 10 :SHL: BoardRevision_Model_Shift
BoardRevision_Model_ZeroW * 12 :SHL: BoardRevision_Model_Shift
BoardRevision_Model_B3Plus * 13 :SHL: BoardRevision_Model_Shift
BoardRevision_Rev_Shift * 0
BoardRevision_Rev_Mask * 15 :SHL: BoardRevision_Rev_Shift
......
s/GPIO
View file @ a04aae74
......@@ -205,22 +205,28 @@ GPIORevision_RaspberryPi_B_1 # 1 ; Model B Rev 1.0
GPIORevision_RaspberryPi_B_2 # 1 ; Model B Rev 2.0
GPIORevision_RaspberryPi_A_2 # 1 ; Model A Rev 2.0
GPIORevision_RaspberryPi_BPlus # 1 ; Model B+
GPIORevision_RaspberryPi_C_1 # 1 ; Model Compute Rev 1.0
GPIORevision_RaspberryPi_C_1 # 1 ; Model CM1
GPIORevision_RaspberryPi_C_3 # 1 ; Model CM3
GPIORevision_RaspberryPi_APlus # 1 ; Model A+
GPIORevision_RaspberryPi_Mk2_B_1 # 1 ; Model Pi 2
GPIORevision_RaspberryPi_Mk2_B # 1 ; Model Pi 2 B
GPIORevision_RaspberryPi_Zero # 1 ; Model Zero
GPIORevision_RaspberryPi_Mk3_B_1 # 1 ; Model Pi 3
GPIORevision_RaspberryPi_ZeroW # 1 ; Model ZeroW
GPIORevision_RaspberryPi_Mk3_B # 1 ; Model Pi 3 B
GPIORevision_RaspberryPi_Mk3_BPlus # 1 ; Model Pi 3 B+
GPIORevision_RaspberryPi_Max # 0
Name_B_1 = "Raspberry Pi B PCB 1.0", 0
Name_B_2 = "Raspberry Pi B PCB 2.0", 0
Name_A_2 = "Raspberry Pi A", 0
Name_BPlus = "Raspberry Pi B+", 0
Name_C_1 = "Raspberry Pi Compute Module", 0
Name_C_1 = "Raspberry Pi Compute Module 1", 0
Name_C_3 = "Raspberry Pi Compute Module 3", 0
Name_APlus = "Raspberry Pi A+", 0
Name_Mk2_B_1 = "Raspberry Pi 2 Model B", 0
Name_Mk2_B = "Raspberry Pi 2 Model B", 0
Name_Zero = "Raspberry Pi Zero", 0
Name_Mk3_B_1 = "Raspberry Pi 3 Model B", 0
Name_ZeroW = "Raspberry Pi Zero W", 0
Name_Mk3_B = "Raspberry Pi 3 Model B", 0
Name_Mk3_BPlus = "Raspberry Pi 3 Model B+", 0
Name_Unknown = "Raspberry Pi Unknown", 0
ALIGN
......@@ -230,10 +236,13 @@ GPIO_Board_Names_Table ; same order as GPIORevision_RaspberryPi types
DCD Name_A_2
DCD Name_BPlus
DCD Name_C_1
DCD Name_C_3
DCD Name_APlus
DCD Name_Mk2_B_1
DCD Name_Mk2_B
DCD Name_Zero
DCD Name_Mk3_B_1
DCD Name_ZeroW
DCD Name_Mk3_B
DCD Name_Mk3_BPlus
ASSERT (.-GPIO_Board_Names_Table) :SHR: 2 = GPIORevision_RaspberryPi_Max
; Lookup table to determine board type (old style)
......@@ -279,17 +288,21 @@ GPIO_Board_Conversion_Table
DCD BoardRevision_Mem_512M+BoardRevision_Model_BPlus+(2:SHL:BoardRevision_Rev_Shift)
DCD GPIORevision_RaspberryPi_BPlus
DCD BoardRevision_Mem_1G+BoardRevision_Model_B2+(1:SHL:BoardRevision_Rev_Shift)
DCD GPIORevision_RaspberryPi_Mk2_B_1
DCD GPIORevision_RaspberryPi_Mk2_B
DCD BoardRevision_Mem_1G+BoardRevision_Model_B2+(2:SHL:BoardRevision_Rev_Shift)
DCD GPIORevision_RaspberryPi_Mk2_B_1
DCD GPIORevision_RaspberryPi_Mk2_B
DCD BoardRevision_Mem_512M+BoardRevision_Model_Zero+(2:SHL:BoardRevision_Rev_Shift)
DCD GPIORevision_RaspberryPi_Zero
DCD BoardRevision_Mem_512M+BoardRevision_Model_Zero+(3:SHL:BoardRevision_Rev_Shift)
DCD GPIORevision_RaspberryPi_Zero
DCD BoardRevision_Mem_1G+BoardRevision_Model_B3+(2:SHL:BoardRevision_Rev_Shift)
DCD GPIORevision_RaspberryPi_Mk3_B_1
DCD GPIORevision_RaspberryPi_Mk3_B
DCD BoardRevision_Mem_1G+BoardRevision_Model_Compute3+(0:SHL:BoardRevision_Rev_Shift)
DCD GPIORevision_RaspberryPi_C_1
DCD GPIORevision_RaspberryPi_C_3
DCD BoardRevision_Mem_512M+BoardRevision_Model_ZeroW+(1:SHL:BoardRevision_Rev_Shift)
DCD GPIORevision_RaspberryPi_ZeroW
DCD BoardRevision_Mem_1G+BoardRevision_Model_B3Plus+(3:SHL:BoardRevision_Rev_Shift)
DCD GPIORevision_RaspberryPi_Mk3_BPlus
DCD &FF
; Initialise our HAL devices
......@@ -927,16 +940,22 @@ GPIOFreeToUse
DCD 2_00000000000000000000000000000000
DCD 2_00001111111111111111111111111111 ; B+
DCD 2_00000000000000000000000000000000
DCD 2_11111111111111111111111111111111 ; Compute rev 1
DCD 2_00000000000000001111111111111111
DCD 2_11111111111111111111111111111111 ; Compute CM1
DCD 2_00000000000000000111111111111111
DCD 2_11111111111111111111111111111111 ; Compute CM3
DCD 2_00000000000000000011111111111111
DCD 2_00001111111111111111111111111111 ; A+
DCD 2_00000000000000000000000000000000
DCD 2_00001111111111111111111111111111 ; 2B
DCD 2_00000000000000000000000000000000
DCD 2_00001111111111111111111111111111 ; zero
DCD 2_00001111111111111111111111111111 ; Zero
DCD 2_00000000000000000000000000000000
DCD 2_00001111111111111111111111111111 ; ZeroW
DCD 2_00000000000000000000000000000000
DCD 2_00001111111111111111111111111111 ; 3B
DCD 2_00000000000000000000000000000000
DCD 2_00001111111111111111111111111111 ; 3B+
DCD 2_00000000000000000000000000000000
; Pin enumerations
GPIO_Port0_Table
......
s/SDIO
View file @ a04aae74
......@@ -329,9 +329,10 @@ SDIO_InitDevices ROUT
BIC a3, a3, #BoardRevision_User_Mask ; mask off overclocking / user bits
TST a3, #BoardRevision_NewScheme
BNE %FT01
ASSERT BoardRevision_AorB_Last < BoardRevision_BPlus
CMP a3, #BoardRevision_BPlus
TEQ a3, #BoardRevision_Compute
ASSERT BoardRevision_AorB_Last < BoardRevision_BPlus_Sony
CMP a3, #BoardRevision_BPlus_Sony
TEQ a3, #BoardRevision_Compute_Sony
TEQNE a3, #BoardRevision_Compute_Embest
B %FT02
01 AND a3, a3, #BoardRevision_Model_Mask
ASSERT BoardRevision_Model_A < BoardRevision_Model_APlus
......@@ -386,6 +387,7 @@ SDIO_InitDevices ROUT
ADRL a2, GetCardDetect_AB
ADDHS a2, a2, #GetCardDetect_BPlus_Compute - GetCardDetect_AB
TEQ a3, #BoardRevision_Model_B3
TEQNE a3, #BoardRevision_Model_B3Plus
ADREQL a1, SetActivity_B3
STR a1, SDHCIDevice + HALDevice_SDHCISetActivity
STR a2, SDHCIDevice + HALDevice_SDHCIGetCardDetect
......
s/Top
View file @ a04aae74
......@@ -258,7 +258,7 @@ start
STR r4,PeriBase
[ HALDebug
mov a1, #1
mov a1, #0
bl HAL_UARTStartUp ; start early for debug use
bl HAL_DebugTXStrInline
DCB "HalStartup",10,0
......
s/UART
View file @ a04aae74
......@@ -128,7 +128,7 @@ HAL_UARTStartUp
DataSyncBarrier a2 ; resync before writing peripheral
BaseAddr
StopUART a2
MOV a2, #&68
LDR a2, =((UARTCLK*64)/115200)/16
AND a3, a2,#&3F
STR a3, [a1,#UARTFBRD]
MOV a2, a2,LSR #6
......
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