Fix for register corruption

In HAL_QueryPlatform a mixture of register naming overlooks r6 (aka v3) gets used, but not preserved.
Uppercase opcodes, add a few more comments around the CRC calculation.

s/Messaging

@@ -55,8 +55,7 @@
         EXPORT  RamAd
         EXPORT  SerNo
 
-
-; send a message packet to the host and await the reply
+; Send a message packet to the host and await the reply
 ; on entry, r0 =  message channel to use and/or wholemessage
 ;           r1 -> message tag buffer, 16 byte aligned. or 0
 ;
@@ -101,22 +100,22 @@ HAL_SendHostMessage  ROUT
 ;         Available DMA channels
 ;
 HAL_QueryPlatform    ROUT
-        STMFD   R13!, {r0-r5, lr}
+        STMFD   R13!, {r0-r6, lr}
  [ HALDebug
-        bl      HAL_DebugTXStrInline
-        DCB     "HalQueryPl",10,0
+        BL      HAL_DebugTXStrInline
+        DCB     "QueryPlatform",10,0
         ALIGN
  ]
-        mrc     p15, 0, r4, c0, c0, 0          ; read Main ID Register
-        and     r4, r4, #&FF00
-        cmp     r4, #&C000                     ; xxxxB76x for ARM1176, xxxxC07x for Cortex-A7
-        movcc   r4, #GPU_L2CnonAl              ; Pi 1 has L2 cache enabled
-        movcs   r4, #GPU_UnCached              ; Pi 2 has L2 cache disabled
-        str     r4, FB_CacheMode               ; remember base of bus addresses (i.e. memory accessed by GPU and GPU peripherals like DMA and USB)
+        MRC     p15, 0, r4, c0, c0, 0          ; read Main ID Register
+        AND     r4, r4, #&FF00
+        CMP     r4, #&C000                     ; xxxxB76x for ARM1176, xxxxC07x for Cortex-A7
+        MOVCC   r4, #GPU_L2CnonAl              ; Pi 1 has L2 cache enabled
+        MOVCS   r4, #GPU_UnCached              ; Pi 2 has L2 cache disabled
+        STR     r4, FB_CacheMode               ; remember base of bus addresses (i.e. memory accessed by GPU and GPU peripherals like DMA and USB)
 
-        adrl    r1, tagbuffer
-        adr     r0, tagb
-        mov     r2, #tagslen
+        ADRL    r0, tagbuffer
+        ADR     r1, tagb
+        MOV     r2, #tagslen
 lp1     ldr     r3, [r0], #4                   ; copy to workspace buffer
         str     r3, [r1], #4
         subs    r2, r2, #4
@@ -165,10 +164,10 @@ lp1     ldr     r3, [r0], #4                   ; copy to workspace buffer
         MOV     a3, a3, LSR #24
         ORR     a2, a3, a2, LSL #8
         MOV     a1, a1, LSL #8
-        ORR     a1, a1, #&81
+        ORR     a1, a1, #&81           ; make it look like a Dallas unique id
         BIC     a2, a2, #&ff000000
-; now encapsulate with crc
-        MOV     a3, #0                 ;
+
+        MOV     a3, #0                 ; compute a Dallas unique id CRC
         MOV     a4, #7                 ; number of bytes to do
 gbyte                                  ;
         AND     v2, a1, #&ff           ; get next byte. shift reg round 8 byte
@@ -199,19 +198,18 @@ gbit                                   ;
         ADRL    lr,MachineID
         STMIA   lr, {a1, a2}
  [ HALDebug
-        bl      HAL_DebugTXStrInline
-        DCB     "HalQueryPldone",10,0
+        BL      HAL_DebugTXStrInline
+        DCB     "QueryPlatform done",10,0
         ALIGN
  ]
-        LDMFD   R13!, {r0-r5, pc}
+        LDMFD   R13!, {r0-r6, pc}
 
 MacAdd  DCD     :INDEX:MAClo  - :INDEX:tagb + :INDEX:tagbuffer
 RamAd   DCD     :INDEX:ARMbs  - :INDEX:tagb + :INDEX:tagbuffer
 SerNo   DCD     :INDEX:SNlo   - :INDEX:tagb + :INDEX:tagbuffer
 
 
-; series of VC side query tags. Using inline code as this is writable at this
-; stage. This means the answers will be encapsulated in rom image!!
+; Series of VC side query tags.
 ;
 tagb    DCD     tagslen
         DCD     0