GitLab

Detail:
  The Raspberry Pi ROM now joins the IOMD ROM in supporting multiple
  architectures, in this case ARMv6 and ARMv7. This has been achieved by
  creating a new machine type specific for Raspberry Pi. The old ARM11ZF
  machine type remains for builds that are ARM11-only.

Version 4.33. Tagged as 'FPASC-4_33'

Detail:
  Code restructuring performed in FPASC-4_12 resulted in an unintentional change in behaviour on ARM2/ARM3 systems when FPEmulator attempts to pass on an abort to the next claimant of the undefined instruction vector.
  Specifically, FPEmulator's startup code was making a note of the address of the current undef environment handler, instead of the address of the pointer to the current handler. This meant that if OS_ChangeEnvironment was used to change the handler once FPEmulator had been loaded, the new handler would never get called - only the old handler would get called.
  On later systems this bug didn't occur as (a) the kernel has a veneer around the undef environment handler (instead of branching straight to the current claimant from the undef vector), and (b) OS_ClaimProcessorVector tells FPEmulator directly where to go next instead of the module having to try and guess for itself.
  File changes:
  - vensrc/riscos/start: Adjust handling of "LDR PC,xxx" undef vector so that the address being loaded from is cached instead of the contents of the address. Construct special code to use when the FPEmulator context is disabled and we want to immediately pass along the abort.
  - vensrc/riscos/globalws: Reserve workspace for storing the passalong code
Admin:
  Tested on RISC OS 3.1 under ArcEm
  ARM3 detection routines which rely on the undef environment handler now work correctly instead of failing with undefined instruction errors
  No impact on builds targeting RISC OS 3.5+ as all changes are wrapped in [ :LNOT: Arm600 ]


Version 4.32. Tagged as 'FPASC-4_32'

Comments updated in CortexA8/CortexA9/STB55/STB5cx/Tungsten.
Machine '32' offers SoftOnly now.
Removed fpemedusa and Phoebe.
Removed some proliferating !MkROM obey files.

Version 4.31. Tagged as 'FPASC-4_31'

Detail:
  Settings are cloned from Tungsten, CortexA8 and other modern machines.
Admin:
  Untested, but Adrian and John have done identical changes and they report
  success.

Version 4.30. Tagged as 'FPASC-4_30'

Detail:
  This is just a clone of the CortexA8 file.
Admin:
  Submission from Willi Theiß.
  Retagged as 'FPASC-4_29' since other builds are unaffected.

Detail:
  Unlike most modules which can just store the zero page pointers in their workspace, FPEmulator is a bit trickier since the zero page pointers are needed from within abort handlers and other places where the module workspace pointer is hard to come by (in fact, FPEmulator uses FPEAnchor to store the module workspace pointer)
  So rather than break/rework lots of perfectly good code, there are now three different FPEmulator builds available, selected via the new FPEAnchorType option:
  * FPEAnchorType=Low will select a build suitable for machines with FPEAnchor at its original location in zero page. This is the default for ROM builds.
  * FPEAnchorType=High will select a build suitable for the FPEAnchor location (&ffff0ff4) that's used with zero page relocation. Machines with relocated zero page must specify this option in their components file.
  * FPEAnchorType=Local will select a build suitable for softloading. Rather than rely on using a zero page location for storing the workspace pointer, the module just stores it within itself. This option is selected automatically for RAM builds and can't be overriden via the components file.
  File changes:
  riscos/Makefile - Reworked makefile to support the new options
  riscos/FPEMacros - Updated AdrWS macro to work with FPEAnchorType=Local
  riscos/options - For non-local builds, declare the appropriate value for FPEAnchor
  riscos/start - Use appropriate FPEAnchor initialisation code
Admin:
  All 3 configs tested (ROM builds on BB-xM, RAM softload on Iyonix)


Version 4.29. Tagged as 'FPASC-4_29'

Detail:
  riscos/s/CortexA8 - Made a copy of the Tungsten FPASC config file for use with Cortex/OMAP ROM builds
Admin:
  Tested on rev C2 beagleboard.
  Not tagged - no functional changes.


Version 4.28. Not tagged

Detail:
  Emulation of instructions like LDFD were doing writeback to r13 with
  interrupts disabled but then re-enabling interrupts before actually
  reading memory, thereby leaving a window for an interrupt to be handled and
  corrupt the unprotected stack memory below r13.
  Fixes ROOL ticket #225.
Admin:
  Changes originally by mwuerthner and committed by srevill on 2009-12-04.

Tagged as 'FPASC-4_28'

Detail:
  Broke certain denormalised cases of multiply, divide and remainder.
  Problem originally reported on Iyonix discussion group (failed Paranoia tesst).
Admin:
  Changes originally committed by kbracey on 2004-09-21.

Tagged as 'FPASC-4_23'

Detail:
  * Denormalised numbers now held consistently in their nominal precision.
    MVF/MNF/ABS of a denormalised number without a change of precision
    treated specially, much like signalling NaNs. This prevents spurious
    underflow traps if they're enabled. Previously

         ; Underflow traps on
         LDFS    F0,DenormalisedSingle
         MVFS    F0,F0

    or

         ; Underflow traps off
         LDFD    F0,SmallestNormalDouble
         MUFD    F0,F0,#0.5
         ; Turn underflow traps on
         STFD    F0,xxx

    would have generated traps.

  * LDFP/STFP rearrangement of NaN significands reinstated, as DDT
    can now make use of it.

  * Typos in over/underflow code for LDFP corrected.

  * Experimental dynamic rounding controls added to FPSR (for emulator
    only). Currently disabled; does not affect LDFP or STFP yet.

Admin:
  Changes originally committed by kbracey on 2004-01-26.

Tagged as 'FPASC-4_21'

Detail:
  * Bug fix in STFP - minor error at bottom of word.
  * New switch to allow use of CLZ.
Admin:
  Changes originally committed by kbracey on 2003-02-21.

Tagged as 'FPASC-4_20'

Detail:
  * Generated NaNs were always negative - they were supposed to have a sign
    based on the operands. As a side effect, some internal routines were not
    obeying their advertised API - this has been corrected.
  * Generated NaNs no longer contained a reason code - this was a deliberate
    ARM change, but I'm going to have a philosophical disagreement and reverse
    it.
Admin:
  Changes originally committed by kbracey on 2002-03-04.

Tagged as 'FPASC-4_18'

Detail:
  Added check to make sure we ignore undefined instruction exceptions generated
  while in Thumb state.
Admin:
  Changes originally committed by kbracey on 2001-05-31.
  This fix was originally applied to an earlier version of ARM's code and has
  been rebased at ARM's version 1.13 for licensing reasons.
  However, since this was the last change before ARM version 1.13 was merged
  into the RISC OS source tree (on 2001-07-25), it is also representative of
  the the RISC OS sources at that date, barring licence header differences.

Tagged as 'Thumb-fix' and 'FPASC-4_16'

Detail:
  ARMv4 architecture (e.g. StrongARM) gains UMULL instruction which enables
  faster calculations at the expense of ARM 2/3/6/7 compatibility.
Admin:
  Changes originally by kbracey, committed 1998-03-27 by mstphens.
  This fix was originally applied to an earlier version of ARM's code and has
  been rebased at ARM's version 1.13 for licensing reasons.

Tagged as 'UMULL-fix'

Detail:
  These had a silicon bug in STM^ instructions - enable workaround by defining
  SASTMhatbroken.
Admin:
  This fix was originally applied to an earlier version of ARM's code and has
  been rebased at ARM's version 1.13 for licensing reasons.

Tagged as 'StrongARM-fix'

This is version 1.13. The original distribution archive is in doc/fpe400.zip.
The coresrc subdirectory is the only part of the official distribution used
in the RISC OS implementation, and is rearranged to use a "s" subdirectory
rather than a ".s" suffix as is customary for RISC OS builds.

Detail:
  This change fixes ticket #225 (post-indexed LDFD via r13 sometimes reading
  corrupted values).

Version 4.28. Tagged as 'FPASC-4_28'

Detail:
  Machine=32 is now built so that it doesn't use UMULL. This is because we
  now require it to operate on ARMv3 Risc PCs and A7000(+).
Admin:
  Untested, but should be low risk.

Version 4.27. Tagged as 'FPASC-4_27'

Detail:
Admin:


Version 4.26. Tagged as 'FPASC-4_26'

Version 4.25. Tagged as 'FPASC-4_25'

(already replaced by Tungsten and Phoebe).

Version 4.24. Tagged as 'FPASC-4_24'

Detail:
  Exports VersionNum to BBE.
  Also removed dynamic dependencies fom Makefile.
Admin:
  Tested in a Tungsten BBE build.

Retagged, since this won't affect existing builds.

Fixed an error in "UseCLZ" case (ie thus affecting only Iyonix currently), which broke certain denormalised cases of multiply, divide and remainder.

Problem originally reported on Iyonix discussion group (failed Paranoia tesst).

Version 4.23. Tagged as 'FPASC-4_23'

Retagged as 'FPASC-4_22'

Detail:
  Files modified: riscos.Makefile, MkRom310, MkRom350, MkRom, MkRomIyx
  Files added: riscos.MkRom380, MkRomUrs
               s.Phoebe, STB5, Tungsten
Admin:
  Upated from Kev's machine by Mike H.

Version 4.22. Tagged as 'FPASC-4_22'

Detail:
  doc.*
Admin:
  From Kev's machine.

  MVF/MNF/ABS of a denormalised number without a change of precision
  treated specially, much like signalling NaNs. This prevents spurious
  underflow traps if they're enabled. Previously

       ; Underflow traps on
       LDFS    F0,DenormalisedSingle
       MVFS    F0,F0

  or

       ; Underflow traps off
       LDFD    F0,SmallestNormalDouble
       MUFD    F0,F0,#0.5
       ; Turn underflow traps on
       STFD    F0,xxx

  would have generated traps.

* LDFP/STFP rearrangement of NaN significands reinstated, as DDT
  can now make use of it.

* Typos in over/underflow code for LDFP corrected.

* Makefile changed to build in rm.${SYSTEM} instead of rm.${MACHINE}.

* Experimental dynamic rounding controls added to FPSR (for emulator
  only). Currently disabled; does not affect LDFP or STFP yet.

Version 4.21. Tagged as 'FPASC-4_21'

New switch to allow use of CLZ.
Added Docs.

Version 4.20. Tagged as 'FPASC-4_20'

  * Moved stripdepnd out of Makefile;
  * Variants passed on amu command line.
Detail:
  * You can now specify the precise build variant of the FPEmulator by passing
    System=... and FPE_APCS=... on the amu command line. There are now more
    files in riscos.s to set the options for various types (as per Wimp).
    The default FPE as was is now built with: System="RO380" FPE_APCS="3/32bit"
Admin:
  Builds.
Version 4.19. Tagged as 'FPASC-4_19'

* Generated NaNs were always negative - they were supposed to have a sign
  based on the operands. As a side effect, some internal routines were not
  obeying their advertised API - this has been corrected.
* Generated NaNs no longer contained a reason code - this was a deliberate
  ARM change, but I'm going to have a philosophical disagreement and reverse
  it.

Version 4.18. Tagged as 'FPASC-4_18'

Version 4.17. Tagged as 'FPASC-4_17'

No new functionality or speed boosts - just accuracy improvements and bug
fixes. See comments in coresrc.s.toplevel for details.

Version 4.16. Tagged as 'FPASC-4_16'

Version 4.15. Tagged as 'FPASC-4_15'

* Fixes to allow correct builds for 26-bit systems (RISC OS 3.1) and 32-bit systems using the 32-bit core (RISC OS 3.5-3.7).

Version 4.14. Tagged as 'FPASC-4_14'

Detail:
  When the long multiply option was added on the Ursula branch, an inexplicable
  change to a single instruction in the original non-long multiply code
  appeared.
  Result would have been slightly inaccurate multiplies when both operands
  had more than 32 bits of mantissa.
  Original code restored.

Version 4.13. Tagged as 'FPASC-4_13'

Multiple context version of FP emulator and FPA support code - FP in callbacks and interrupts can now be yours.

  Exception dumps now available (integer and FP).

Detail:
* Changed to multiple-context version of the core. This will allow floating-
  point to be used safely in callbacks and interrupt routines (as long as
  you call the appropriate context changing SWIs). This activates the
  dormant SWIs FPEmulator_ChangeContext, FPEmulator_ContextLength and
  FPEmulator_InitContext. FPEmulator_DeactivateContext and
  FPEmulator_ActivateContext now have full functionality.

* Added new SWI interfaces to core: FPEmulator_Abort, FPEmulator_LoadContext
  and FPEmulator_SaveContext.

* On FP exceptions, integer registers are copied into the exception dump area.
  (TO DO: registers are USR mode ones - should take pains to figure out
  SVC or IRQ ones as required).

* The FPEmulator now has an exception dump area for floating point registers -
  a suitable version of Debugger will show these with *ShowFPRegs.

* FPEmulator_ChangeContext and FPEmulator_DeactivateContext now return -1
  for the default context.

* Run time detection of SVC stack position added.

* No longer creates a MessageTrans descriptor on the stack.

* Removed broken STM^ fudge from the FPA veneer, as the only StrongARMs that
  need it can't use the FPA.

* Fixed a typo in core_abort.

* Stopped continuous emulation runs crossing 4K page boundaries, with a view
  to improving abort handling.

* Use of DREG debugging macros fixed (line endings were being inserted in the
  wrong place).

* Prototype code to catch aborts inside the emulator and change the registers
  to make it look like the emulated instruction aborted. This is cute, but
  causes problems with anything like Ursula's lazy task-swapping. Really this
  needs to be done only on fatal aborts. Compiled out for now.

Version 4.12. Tagged as 'FPASC-4_12'

Detail:
  Now 32-bit module compatible.
Admin:
  Tested the 26-bit build in the Customer F5 build.
  32-bit build tested on prototype 32-bit RISC OS.


Version 4.11. Tagged as 'FPASC-4_11'

  Use of UMULL (compiled out).
  Service call table.
  Runs in UND32 mode (requires latest Kernel), giving a speed boost.

Version 4.10. Tagged as 'FPASC-4_10'