Commit a31ce970 authored by Robert Sprowson's avatar Robert Sprowson
Browse files

Fix bug in usermode_donothing() exposed by using this from the Internet module.

In the 26 bit case the TEQP pc,#0 switches to user mode and enables interrupts (see section 8.2.1 of ARM ARM revision E), however the 32 bit case only switched to user mode.
Since interrupts were not enabled, no callbacks got collected, and you just sit in a tight loop. Since a precondition of collecting callbacks is that interrupts are enabled it is safe to reenable them since the caller must have expected this to happen.
Since none of the SWIs in question corrupt R12, we no longer stack it either.

Version 0.13. Tagged as 'AsmUtils-0_13'
parent f9d65263
/* (0.12)
/* (0.13)
* This file is automatically maintained by srccommit, do not edit manually.
* Last processed by srccommit version: 1.1.
#define Module_MajorVersion_CMHG 0.12
#define Module_MajorVersion_CMHG 0.13
#define Module_MinorVersion_CMHG
#define Module_Date_CMHG 14 Dec 2011
#define Module_Date_CMHG 24 Dec 2011
#define Module_MajorVersion "0.12"
#define Module_Version 12
#define Module_MajorVersion "0.13"
#define Module_Version 13
#define Module_MinorVersion ""
#define Module_Date "14 Dec 2011"
#define Module_Date "24 Dec 2011"
#define Module_ApplicationDate "14-Dec-11"
#define Module_ApplicationDate "24-Dec-11"
#define Module_ComponentName "AsmUtils"
#define Module_ComponentPath "castle/RiscOS/Sources/Lib/AsmUtils"
#define Module_FullVersion "0.12"
#define Module_HelpVersion "0.12 (14 Dec 2011)"
#define Module_LibraryVersionInfo "0:12"
#define Module_FullVersion "0.13"
#define Module_HelpVersion "0.13 (24 Dec 2011)"
#define Module_LibraryVersionInfo "0:13"
......@@ -55,24 +55,22 @@ CollectCallbacks
FunctionEntry "r12"
SWI XOS_LeaveOS ; Have we got the nice SWI to do it?
Return "r12",,VC
[ No32bitCode
TEQP pc, #0 ; Set USR26 mode
TEQP pc, #0 ; Set USR mode, IRQs and FIQs enabled
MRS r3, CPSR ; Get current PSR
BIC r3, r3, #2_01111 ; r2_c now USR26 or USR32 mode
MSR CPSR_c, r3 ; change mode
BIC r3, r3, #I32_bit :OR: F32_bit :OR: 2_1111
MSR CPSR_c, r3 ; Set USR26/USR32 mode, IRQs and FIQs enabled
MOV r0, #0
MOV r1, #1
SWI XOS_Byte ; make a SWI call from USR mode
SWI XOS_EnterOS ; re-enter SVC26/SVC32 mode
SWI XOS_LeaveOS ; SWI call from USR mode with interrupts enabled triggers callbacks
MOVVS r0, #0
MOVVS r1, #1
SWIVS XOS_Byte ; No 'OS_LeaveOS', do this instead (slower)
SWI XOS_EnterOS ; Re-enter SVC26/SVC32 mode
[ No32bitCode
Return "r12"
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