Commit 44a5cb1d authored by Ben Avison's avatar Ben Avison
Browse files

Fixed Hdr:CPU.Arch so that it actually works

Detail:
  Didn't previously interact with other standard RISC OS headers, especially
  Hdr:ListOpts
Admin:
  Has now been used successfully in an (as-yet unreleased) build of Squash
  to add compatibility with ARMv6

Version 1.67. Tagged as 'HdrSrc-1_67'
parent 742e287d
/* (1.66)
/* (1.67)
*
* This file is automatically maintained by srccommit, do not edit manually.
* Last processed by srccommit version: 1.1.
*
*/
#define Module_MajorVersion_CMHG 1.66
#define Module_MajorVersion_CMHG 1.67
#define Module_MinorVersion_CMHG
#define Module_Date_CMHG 08 May 2009
#define Module_MajorVersion "1.66"
#define Module_Version 166
#define Module_MajorVersion "1.67"
#define Module_Version 167
#define Module_MinorVersion ""
#define Module_Date "08 May 2009"
......@@ -18,6 +18,6 @@
#define Module_ComponentName "HdrSrc"
#define Module_ComponentPath "castle/RiscOS/Sources/Programmer/HdrSrc"
#define Module_FullVersion "1.66"
#define Module_HelpVersion "1.66 (08 May 2009)"
#define Module_LibraryVersionInfo "1:66"
#define Module_FullVersion "1.67"
#define Module_HelpVersion "1.67 (08 May 2009)"
#define Module_LibraryVersionInfo "1:67"
......@@ -139,11 +139,13 @@
; ]
OldOpt SETA {OPT}
OPT OptNoList+OptNoP1List
[ :LNOT: :DEF: Included_Hdr_CPU_Arch
GBLL Included_Hdr_CPU_Arch
Included_Hdr_ARMarch SETL {TRUE}
Included_Hdr_CPU_Arch SETL {TRUE}
GET Hdr:ListOpts
GET Hdr:Machine.<Machine>
; MRS/MSR and USR32, IRQ32, FIQ32, SVC32, ABT and UND modes
......@@ -565,4 +567,5 @@ NoARMA SETL (MchFlgs_CumulativeNOT :AND: MchFlg_A) > 0
]
OPT OldOpt
END
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